/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc

Bug Summary

File:	build/gcc/expr.cc
Warning:	line 3338, column 5 2nd function call argument is an uninitialized value
Annotated Source Code

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clang -cc1 -cc1 -triple x86_64-suse-linux -analyze -disable-free -clear-ast-before-backend -disable-llvm-verifier -discard-value-names -main-file-name expr.cc -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=cplusplus -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -analyzer-config-compatibility-mode=true -mrelocation-model static -mframe-pointer=none -fmath-errno -ffp-contract=on -fno-rounding-math -mconstructor-aliases -funwind-tables=2 -target-cpu x86-64 -tune-cpu generic -debugger-tuning=gdb -fcoverage-compilation-dir=/buildworker/marxinbox-gcc-clang-static-analyzer/objdir/gcc -resource-dir /usr/lib64/clang/15.0.7 -D IN_GCC -D HAVE_CONFIG_H -I . -I . -I /buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc -I /buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/. -I /buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/../include -I /buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/../libcpp/include -I /buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/../libcody -I /buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/../libdecnumber -I /buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/../libdecnumber/bid -I ../libdecnumber -I /buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/../libbacktrace -internal-isystem /usr/bin/../lib64/gcc/x86_64-suse-linux/13/../../../../include/c++/13 -internal-isystem /usr/bin/../lib64/gcc/x86_64-suse-linux/13/../../../../include/c++/13/x86_64-suse-linux -internal-isystem /usr/bin/../lib64/gcc/x86_64-suse-linux/13/../../../../include/c++/13/backward -internal-isystem /usr/lib64/clang/15.0.7/include -internal-isystem /usr/local/include -internal-isystem /usr/bin/../lib64/gcc/x86_64-suse-linux/13/../../../../x86_64-suse-linux/include -internal-externc-isystem /include -internal-externc-isystem /usr/include -O2 -Wno-narrowing -Wwrite-strings -Wno-long-long -Wno-variadic-macros -Wno-overlength-strings -fdeprecated-macro -fdebug-compilation-dir=/buildworker/marxinbox-gcc-clang-static-analyzer/objdir/gcc -ferror-limit 19 -fno-rtti -fgnuc-version=4.2.1 -vectorize-loops -vectorize-slp -analyzer-output=plist-html -analyzer-config silence-checkers=core.NullDereference -faddrsig -D__GCC_HAVE_DWARF2_CFI_ASM=1 -o /buildworker/marxinbox-gcc-clang-static-analyzer/objdir/clang-static-analyzer/2023-03-27-141847-20772-1/report-s34u3j.plist -x c++ /buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc
1/* Convert tree expression to rtl instructions, for GNU compiler.
 Copyright (C) 1988-2023 Free Software Foundation, Inc.

4This file is part of GCC.

6GCC is free software; you can redistribute it and/or modify it under
7the terms of the GNU General Public License as published by the Free
8Software Foundation; either version 3, or (at your option) any later
9version.

11GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12WARRANTY; without even the implied warranty of MERCHANTABILITY or
13FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
14for more details.

16You should have received a copy of the GNU General Public License
17along with GCC; see the file COPYING3.  If not see
18<http://www.gnu.org/licenses/>.  */

20#include "config.h"
21#include "system.h"
22#include "coretypes.h"
23#include "backend.h"
24#include "target.h"
25#include "rtl.h"
26#include "tree.h"
27#include "gimple.h"
28#include "predict.h"
29#include "memmodel.h"
30#include "tm_p.h"
31#include "ssa.h"
32#include "optabs.h"
33#include "expmed.h"
34#include "regs.h"
35#include "emit-rtl.h"
36#include "recog.h"
37#include "cgraph.h"
38#include "diagnostic.h"
39#include "alias.h"
40#include "fold-const.h"
41#include "stor-layout.h"
42#include "attribs.h"
43#include "varasm.h"
44#include "except.h"
45#include "insn-attr.h"
46#include "dojump.h"
47#include "explow.h"
48#include "calls.h"
49#include "stmt.h"
50/* Include expr.h after insn-config.h so we get HAVE_conditional_move.  */
51#include "expr.h"
52#include "optabs-tree.h"
53#include "libfuncs.h"
54#include "reload.h"
55#include "langhooks.h"
56#include "common/common-target.h"
57#include "tree-dfa.h"
58#include "tree-ssa-live.h"
59#include "tree-outof-ssa.h"
60#include "tree-ssa-address.h"
61#include "builtins.h"
62#include "ccmp.h"
63#include "gimple-iterator.h"
64#include "gimple-fold.h"
65#include "rtx-vector-builder.h"
66#include "tree-pretty-print.h"
67#include "flags.h"


70/* If this is nonzero, we do not bother generating VOLATILE
 around volatile memory references, and we are willing to
 output indirect addresses.  If cse is to follow, we reject
 indirect addresses so a useful potential cse is generated;
 if it is used only once, instruction combination will produce
 the same indirect address eventually.  */
76int cse_not_expected;

78static bool block_move_libcall_safe_for_call_parm (void);
79static bool emit_block_move_via_pattern (rtx, rtx, rtx, unsigned, unsigned, 
			 HOST_WIDE_INTlong, unsigned HOST_WIDE_INTlong,
			 unsigned HOST_WIDE_INTlong,
			 unsigned HOST_WIDE_INTlong, bool);
83static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
84static void clear_by_pieces (rtx, unsigned HOST_WIDE_INTlong, unsigned int);
85static rtx_insn *compress_float_constant (rtx, rtx);
86static rtx get_subtarget (rtx);
87static rtx store_field (rtx, poly_int64, poly_int64, poly_uint64, poly_uint64,
	machine_mode, tree, alias_set_type, bool, bool);

90static unsigned HOST_WIDE_INTlong highest_pow2_factor_for_target (const_tree, const_tree);

92static int is_aligning_offset (const_tree, const_tree);
93static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
94static rtx do_store_flag (sepops, rtx, machine_mode);
95#ifdef PUSH_ROUNDING
96static void emit_single_push_insn (machine_mode, rtx, tree);
97#endif
98static void do_tablejump (rtx, machine_mode, rtx, rtx, rtx,
	  profile_probability);
100static rtx const_vector_from_tree (tree);
101static tree tree_expr_size (const_tree);
102static void convert_mode_scalar (rtx, rtx, int);

104
105/* This is run to set up which modes can be used
 directly in memory and to initialize the block move optab.  It is run
 at the beginning of compilation and when the target is reinitialized.  */

109void
110init_expr_target (void)
111{
rtx pat;
int num_clobbers;
rtx mem, mem1;
rtx reg;

/* Try indexing by frame ptr and try by stack ptr.
   It is known that on the Convex the stack ptr isn't a valid index.
   With luck, one or the other is valid on any machine.  */
mem = gen_rtx_MEM (word_mode, stack_pointer_rtx((this_target_rtl->x_global_rtl)[GR_STACK_POINTER]));
mem1 = gen_rtx_MEM (word_mode, frame_pointer_rtx((this_target_rtl->x_global_rtl)[GR_FRAME_POINTER]));

/* A scratch register we can modify in-place below to avoid
   useless RTL allocations.  */
reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER(((76)) + 5) + 1);

rtx_insn *insn = as_a<rtx_insn *> (rtx_alloc (INSN));
pat = gen_rtx_SET (NULL_RTX, NULL_RTX)gen_rtx_fmt_ee_stat ((SET), (((void) 0, E_VOIDmode)), (((rtx)
 0)), (((rtx) 0)) );
PATTERN (insn) = pat;

for (machine_mode mode = VOIDmode((void) 0, E_VOIDmode); (int) mode < NUM_MACHINE_MODES;
     mode = (machine_mode) ((int) mode + 1))
  {
    int regno;

    direct_load(this_target_regs->x_direct_load)[(int) mode] = direct_store(this_target_regs->x_direct_store)[(int) mode] = 0;
    PUT_MODE (mem, mode);
    PUT_MODE (mem1, mode);

    /* See if there is some register that can be used in this mode and
directly loaded or stored from memory.  */

    if (mode != VOIDmode((void) 0, E_VOIDmode) && mode != BLKmode((void) 0, E_BLKmode))
for (regno = 0; regno < FIRST_PSEUDO_REGISTER76
    && (direct_load(this_target_regs->x_direct_load)[(int) mode] == 0 || direct_store(this_target_regs->x_direct_store)[(int) mode] == 0);
    regno++)
 {
   if (!targetm.hard_regno_mode_ok (regno, mode))
     continue;

   set_mode_and_regno (reg, mode, regno);

   SET_SRC (pat)(((pat)->u.fld[1]).rt_rtx) = mem;
   SET_DEST (pat)(((pat)->u.fld[0]).rt_rtx) = reg;
   if (recog (pat, insn, &num_clobbers) >= 0)
     direct_load(this_target_regs->x_direct_load)[(int) mode] = 1;

   SET_SRC (pat)(((pat)->u.fld[1]).rt_rtx) = mem1;
   SET_DEST (pat)(((pat)->u.fld[0]).rt_rtx) = reg;
   if (recog (pat, insn, &num_clobbers) >= 0)
     direct_load(this_target_regs->x_direct_load)[(int) mode] = 1;

   SET_SRC (pat)(((pat)->u.fld[1]).rt_rtx) = reg;
   SET_DEST (pat)(((pat)->u.fld[0]).rt_rtx) = mem;
   if (recog (pat, insn, &num_clobbers) >= 0)
     direct_store(this_target_regs->x_direct_store)[(int) mode] = 1;

   SET_SRC (pat)(((pat)->u.fld[1]).rt_rtx) = reg;
   SET_DEST (pat)(((pat)->u.fld[0]).rt_rtx) = mem1;
   if (recog (pat, insn, &num_clobbers) >= 0)
     direct_store(this_target_regs->x_direct_store)[(int) mode] = 1;
 }
  }

mem = gen_rtx_MEM (VOIDmode((void) 0, E_VOIDmode), gen_raw_REG (Pmode(global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode (
(scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode))), LAST_VIRTUAL_REGISTER(((76)) + 5) + 1));

opt_scalar_float_mode mode_iter;
FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_FLOAT)for (mode_iterator::start (&(mode_iter), MODE_FLOAT); mode_iterator
::iterate_p (&(mode_iter)); mode_iterator::get_next (&
(mode_iter)))
  {
    scalar_float_mode mode = mode_iter.require ();
    scalar_float_mode srcmode;
    FOR_EACH_MODE_UNTIL (srcmode, mode)for ((srcmode) = (get_narrowest_mode (mode)); (srcmode) != (mode
); mode_iterator::get_known_next (&(srcmode)))
{
 enum insn_code ic;

 ic = can_extend_p (mode, srcmode, 0);
 if (ic == CODE_FOR_nothing)
   continue;

 PUT_MODE (mem, srcmode);

 if (insn_operand_matches (ic, 1, mem))
   float_extend_from_mem(this_target_regs->x_float_extend_from_mem)[mode][srcmode] = true;
}
  }
196}

198/* This is run at the start of compiling a function.  */

200void
201init_expr (void)
202{
memset (&crtl(&x_rtl)->expr, 0, sizeof (crtl(&x_rtl)->expr));
204}
205
206/* Copy data from FROM to TO, where the machine modes are not the same.
 Both modes may be integer, or both may be floating, or both may be
 fixed-point.
 UNSIGNEDP should be nonzero if FROM is an unsigned type.
 This causes zero-extension instead of sign-extension.  */

212void
213convert_move (rtx to, rtx from, int unsignedp)
214{
machine_mode to_mode = GET_MODE (to)((machine_mode) (to)->mode);
machine_mode from_mode = GET_MODE (from)((machine_mode) (from)->mode);

gcc_assert (to_mode != BLKmode)((void)(!(to_mode != ((void) 0, E_BLKmode)) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 218, __FUNCTION__), 0 : 0));
gcc_assert (from_mode != BLKmode)((void)(!(from_mode != ((void) 0, E_BLKmode)) ? fancy_abort (
"/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 219, __FUNCTION__), 0 : 0));

/* If the source and destination are already the same, then there's
   nothing to do.  */
if (to == from)
  return;

/* If FROM is a SUBREG that indicates that we have already done at least
   the required extension, strip it.  We don't handle such SUBREGs as
   TO here.  */

scalar_int_mode to_int_mode;
if (GET_CODE (from)((enum rtx_code) (from)->code) == SUBREG
    && SUBREG_PROMOTED_VAR_P (from)(__extension__ ({ __typeof ((from)) const _rtx = ((from)); if
 (((enum rtx_code) (_rtx)->code) != SUBREG) rtl_check_failed_flag
 ("SUBREG_PROMOTED", _rtx, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 232, __FUNCTION__); _rtx; })->in_struct)
    && is_a <scalar_int_mode> (to_mode, &to_int_mode)
    && (GET_MODE_PRECISION (subreg_promoted_mode (from))
 >= GET_MODE_PRECISION (to_int_mode))
    && SUBREG_CHECK_PROMOTED_SIGN (from, unsignedp)((unsignedp) == SRP_POINTER ? (2 * (__extension__ ({ __typeof
 ((from)) const _rtx = ((from)); if (((enum rtx_code) (_rtx)->
code) != SUBREG) rtl_check_failed_flag ("SUBREG_PROMOTED_GET"
, _rtx, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 236, __FUNCTION__); _rtx; })->volatil) + (from)->unchanging
 - 1) == SRP_POINTER : (unsignedp) == SRP_SIGNED ? (__extension__
 ({ __typeof ((from)) const _rtx = ((from)); if (((enum rtx_code
) (_rtx)->code) != SUBREG) rtl_check_failed_flag ("SUBREG_PROMOTED_SIGNED_P"
, _rtx, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 236, __FUNCTION__); _rtx; })->unchanging) : (__extension__
 ({ __typeof ((from)) const _rtx = ((from)); if (((enum rtx_code
) (_rtx)->code) != SUBREG) rtl_check_failed_flag ("SUBREG_PROMOTED_UNSIGNED_P"
, _rtx, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 236, __FUNCTION__); _rtx; })->volatil)))
  {
    scalar_int_mode int_orig_mode;
    scalar_int_mode int_inner_mode;
    machine_mode orig_mode = GET_MODE (from)((machine_mode) (from)->mode);

    from = gen_lowpartrtl_hooks.gen_lowpart (to_int_mode, SUBREG_REG (from)(((from)->u.fld[0]).rt_rtx));
    from_mode = to_int_mode;

    /* Preserve SUBREG_PROMOTED_VAR_P if the new mode is wider than
the original mode, but narrower than the inner mode.  */
    if (GET_CODE (from)((enum rtx_code) (from)->code) == SUBREG
 && is_a <scalar_int_mode> (orig_mode, &int_orig_mode)
 && GET_MODE_PRECISION (to_int_mode)
    > GET_MODE_PRECISION (int_orig_mode)
 && is_a <scalar_int_mode> (GET_MODE (SUBREG_REG (from))((machine_mode) ((((from)->u.fld[0]).rt_rtx))->mode),
		     &int_inner_mode)
 && GET_MODE_PRECISION (int_inner_mode)
    > GET_MODE_PRECISION (to_int_mode))
{
 SUBREG_PROMOTED_VAR_P (from)(__extension__ ({ __typeof ((from)) const _rtx = ((from)); if
 (((enum rtx_code) (_rtx)->code) != SUBREG) rtl_check_failed_flag
 ("SUBREG_PROMOTED", _rtx, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 256, __FUNCTION__); _rtx; })->in_struct) = 1;
 SUBREG_PROMOTED_SET (from, unsignedp)do { rtx const _rtx = __extension__ ({ __typeof ((from)) const
 _rtx = ((from)); if (((enum rtx_code) (_rtx)->code) != SUBREG
) rtl_check_failed_flag ("SUBREG_PROMOTED_SET", _rtx, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 257, __FUNCTION__); _rtx; }); switch (unsignedp) { case SRP_POINTER
: _rtx->volatil = 0; _rtx->unchanging = 0; break; case SRP_SIGNED
: _rtx->volatil = 0; _rtx->unchanging = 1; break; case SRP_UNSIGNED
: _rtx->volatil = 1; _rtx->unchanging = 0; break; case SRP_SIGNED_AND_UNSIGNED
: _rtx->volatil = 1; _rtx->unchanging = 1; break; } } while
 (0);
}
  }

gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to))((void)(!(((enum rtx_code) (to)->code) != SUBREG || !(__extension__
 ({ __typeof ((to)) const _rtx = ((to)); if (((enum rtx_code)
 (_rtx)->code) != SUBREG) rtl_check_failed_flag ("SUBREG_PROMOTED"
, _rtx, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 261, __FUNCTION__); _rtx; })->in_struct)) ? fancy_abort (
"/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 261, __FUNCTION__), 0 : 0));

if (to_mode == from_mode
    || (from_mode == VOIDmode((void) 0, E_VOIDmode) && CONSTANT_P (from)((rtx_class[(int) (((enum rtx_code) (from)->code))]) == RTX_CONST_OBJ
)))
  {
    emit_move_insn (to, from);
    return;
  }

if (VECTOR_MODE_P (to_mode)(((enum mode_class) mode_class[to_mode]) == MODE_VECTOR_BOOL ||
 ((enum mode_class) mode_class[to_mode]) == MODE_VECTOR_INT ||
 ((enum mode_class) mode_class[to_mode]) == MODE_VECTOR_FLOAT
 || ((enum mode_class) mode_class[to_mode]) == MODE_VECTOR_FRACT
 || ((enum mode_class) mode_class[to_mode]) == MODE_VECTOR_UFRACT
 || ((enum mode_class) mode_class[to_mode]) == MODE_VECTOR_ACCUM
 || ((enum mode_class) mode_class[to_mode]) == MODE_VECTOR_UACCUM
) || VECTOR_MODE_P (from_mode)(((enum mode_class) mode_class[from_mode]) == MODE_VECTOR_BOOL
 || ((enum mode_class) mode_class[from_mode]) == MODE_VECTOR_INT
 || ((enum mode_class) mode_class[from_mode]) == MODE_VECTOR_FLOAT
 || ((enum mode_class) mode_class[from_mode]) == MODE_VECTOR_FRACT
 || ((enum mode_class) mode_class[from_mode]) == MODE_VECTOR_UFRACT
 || ((enum mode_class) mode_class[from_mode]) == MODE_VECTOR_ACCUM
 || ((enum mode_class) mode_class[from_mode]) == MODE_VECTOR_UACCUM
))
  {
    if (GET_MODE_UNIT_PRECISION (to_mode)(mode_to_unit_precision (to_mode))
 > GET_MODE_UNIT_PRECISION (from_mode)(mode_to_unit_precision (from_mode)))
{
 optab op = unsignedp ? zext_optab : sext_optab;
 insn_code icode = convert_optab_handler (op, to_mode, from_mode);
 if (icode != CODE_FOR_nothing)
   {
     emit_unop_insn (icode, to, from,
	      unsignedp ? ZERO_EXTEND : SIGN_EXTEND);
     return;
   }
}

    if (GET_MODE_UNIT_PRECISION (to_mode)(mode_to_unit_precision (to_mode))
 < GET_MODE_UNIT_PRECISION (from_mode)(mode_to_unit_precision (from_mode)))
{
 insn_code icode = convert_optab_handler (trunc_optab,
				   to_mode, from_mode);
 if (icode != CODE_FOR_nothing)
   {
     emit_unop_insn (icode, to, from, TRUNCATE);
     return;
   }
}

    gcc_assert (known_eq (GET_MODE_BITSIZE (from_mode),((void)(!((!maybe_ne (GET_MODE_BITSIZE (from_mode), GET_MODE_BITSIZE
 (to_mode)))) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 298, __FUNCTION__), 0 : 0))
	    GET_MODE_BITSIZE (to_mode)))((void)(!((!maybe_ne (GET_MODE_BITSIZE (from_mode), GET_MODE_BITSIZE
 (to_mode)))) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 298, __FUNCTION__), 0 : 0));

    if (VECTOR_MODE_P (to_mode)(((enum mode_class) mode_class[to_mode]) == MODE_VECTOR_BOOL ||
 ((enum mode_class) mode_class[to_mode]) == MODE_VECTOR_INT ||
 ((enum mode_class) mode_class[to_mode]) == MODE_VECTOR_FLOAT
 || ((enum mode_class) mode_class[to_mode]) == MODE_VECTOR_FRACT
 || ((enum mode_class) mode_class[to_mode]) == MODE_VECTOR_UFRACT
 || ((enum mode_class) mode_class[to_mode]) == MODE_VECTOR_ACCUM
 || ((enum mode_class) mode_class[to_mode]) == MODE_VECTOR_UACCUM
))
from = simplify_gen_subreg (to_mode, from, GET_MODE (from)((machine_mode) (from)->mode), 0);
    else
to = simplify_gen_subreg (from_mode, to, GET_MODE (to)((machine_mode) (to)->mode), 0);

    emit_move_insn (to, from);
    return;
  }

if (GET_CODE (to)((enum rtx_code) (to)->code) == CONCAT && GET_CODE (from)((enum rtx_code) (from)->code) == CONCAT)
  {
    convert_move (XEXP (to, 0)(((to)->u.fld[0]).rt_rtx), XEXP (from, 0)(((from)->u.fld[0]).rt_rtx), unsignedp);
    convert_move (XEXP (to, 1)(((to)->u.fld[1]).rt_rtx), XEXP (from, 1)(((from)->u.fld[1]).rt_rtx), unsignedp);
    return;
  }

convert_mode_scalar (to, from, unsignedp);
317}

319/* Like convert_move, but deals only with scalar modes.  */

321static void
322convert_mode_scalar (rtx to, rtx from, int unsignedp)
323{
/* Both modes should be scalar types.  */
scalar_mode from_mode = as_a <scalar_mode> (GET_MODE (from)((machine_mode) (from)->mode));
scalar_mode to_mode = as_a <scalar_mode> (GET_MODE (to)((machine_mode) (to)->mode));
bool to_real = SCALAR_FLOAT_MODE_P (to_mode)(((enum mode_class) mode_class[to_mode]) == MODE_FLOAT || ((enum
 mode_class) mode_class[to_mode]) == MODE_DECIMAL_FLOAT);
bool from_real = SCALAR_FLOAT_MODE_P (from_mode)(((enum mode_class) mode_class[from_mode]) == MODE_FLOAT || (
(enum mode_class) mode_class[from_mode]) == MODE_DECIMAL_FLOAT
);
enum insn_code code;
rtx libcall;

gcc_assert (to_real == from_real)((void)(!(to_real == from_real) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 332, __FUNCTION__), 0 : 0));

/* rtx code for making an equivalent value.  */
enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
	      : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));

if (to_real)
  {
    rtx value;
    rtx_insn *insns;
    convert_optab tab;

    gcc_assert ((GET_MODE_PRECISION (from_mode)((void)(!((GET_MODE_PRECISION (from_mode) != GET_MODE_PRECISION
 (to_mode)) || ((((enum mode_class) mode_class[from_mode]) ==
 MODE_DECIMAL_FLOAT) != (((enum mode_class) mode_class[to_mode
]) == MODE_DECIMAL_FLOAT)) || ((real_format_for_mode[(((enum mode_class
) mode_class[from_mode]) == MODE_DECIMAL_FLOAT) ? (((from_mode
) - MIN_MODE_DECIMAL_FLOAT) + (MAX_MODE_FLOAT - MIN_MODE_FLOAT
 + 1)) : ((enum mode_class) mode_class[from_mode]) == MODE_FLOAT
 ? ((from_mode) - MIN_MODE_FLOAT) : ((fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 348, __FUNCTION__)), 0)]) == &arm_bfloat_half_format &&
 (real_format_for_mode[(((enum mode_class) mode_class[to_mode
]) == MODE_DECIMAL_FLOAT) ? (((to_mode) - MIN_MODE_DECIMAL_FLOAT
) + (MAX_MODE_FLOAT - MIN_MODE_FLOAT + 1)) : ((enum mode_class
) mode_class[to_mode]) == MODE_FLOAT ? ((to_mode) - MIN_MODE_FLOAT
) : ((fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 349, __FUNCTION__)), 0)]) == &ieee_half_format) || ((real_format_for_mode
[(((enum mode_class) mode_class[to_mode]) == MODE_DECIMAL_FLOAT
) ? (((to_mode) - MIN_MODE_DECIMAL_FLOAT) + (MAX_MODE_FLOAT -
 MIN_MODE_FLOAT + 1)) : ((enum mode_class) mode_class[to_mode
]) == MODE_FLOAT ? ((to_mode) - MIN_MODE_FLOAT) : ((fancy_abort
 ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 350, __FUNCTION__)), 0)]) == &arm_bfloat_half_format &&
 (real_format_for_mode[(((enum mode_class) mode_class[from_mode
]) == MODE_DECIMAL_FLOAT) ? (((from_mode) - MIN_MODE_DECIMAL_FLOAT
) + (MAX_MODE_FLOAT - MIN_MODE_FLOAT + 1)) : ((enum mode_class
) mode_class[from_mode]) == MODE_FLOAT ? ((from_mode) - MIN_MODE_FLOAT
) : ((fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 351, __FUNCTION__)), 0)]) == &ieee_half_format)) ? fancy_abort
 ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 351, __FUNCTION__), 0 : 0))
   != GET_MODE_PRECISION (to_mode))((void)(!((GET_MODE_PRECISION (from_mode) != GET_MODE_PRECISION
 (to_mode)) || ((((enum mode_class) mode_class[from_mode]) ==
 MODE_DECIMAL_FLOAT) != (((enum mode_class) mode_class[to_mode
]) == MODE_DECIMAL_FLOAT)) || ((real_format_for_mode[(((enum mode_class
) mode_class[from_mode]) == MODE_DECIMAL_FLOAT) ? (((from_mode
) - MIN_MODE_DECIMAL_FLOAT) + (MAX_MODE_FLOAT - MIN_MODE_FLOAT
 + 1)) : ((enum mode_class) mode_class[from_mode]) == MODE_FLOAT
 ? ((from_mode) - MIN_MODE_FLOAT) : ((fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 348, __FUNCTION__)), 0)]) == &arm_bfloat_half_format &&
 (real_format_for_mode[(((enum mode_class) mode_class[to_mode
]) == MODE_DECIMAL_FLOAT) ? (((to_mode) - MIN_MODE_DECIMAL_FLOAT
) + (MAX_MODE_FLOAT - MIN_MODE_FLOAT + 1)) : ((enum mode_class
) mode_class[to_mode]) == MODE_FLOAT ? ((to_mode) - MIN_MODE_FLOAT
) : ((fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 349, __FUNCTION__)), 0)]) == &ieee_half_format) || ((real_format_for_mode
[(((enum mode_class) mode_class[to_mode]) == MODE_DECIMAL_FLOAT
) ? (((to_mode) - MIN_MODE_DECIMAL_FLOAT) + (MAX_MODE_FLOAT -
 MIN_MODE_FLOAT + 1)) : ((enum mode_class) mode_class[to_mode
]) == MODE_FLOAT ? ((to_mode) - MIN_MODE_FLOAT) : ((fancy_abort
 ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 350, __FUNCTION__)), 0)]) == &arm_bfloat_half_format &&
 (real_format_for_mode[(((enum mode_class) mode_class[from_mode
]) == MODE_DECIMAL_FLOAT) ? (((from_mode) - MIN_MODE_DECIMAL_FLOAT
) + (MAX_MODE_FLOAT - MIN_MODE_FLOAT + 1)) : ((enum mode_class
) mode_class[from_mode]) == MODE_FLOAT ? ((from_mode) - MIN_MODE_FLOAT
) : ((fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 351, __FUNCTION__)), 0)]) == &ieee_half_format)) ? fancy_abort
 ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 351, __FUNCTION__), 0 : 0))
  || (DECIMAL_FLOAT_MODE_P (from_mode)((void)(!((GET_MODE_PRECISION (from_mode) != GET_MODE_PRECISION
 (to_mode)) || ((((enum mode_class) mode_class[from_mode]) ==
 MODE_DECIMAL_FLOAT) != (((enum mode_class) mode_class[to_mode
]) == MODE_DECIMAL_FLOAT)) || ((real_format_for_mode[(((enum mode_class
) mode_class[from_mode]) == MODE_DECIMAL_FLOAT) ? (((from_mode
) - MIN_MODE_DECIMAL_FLOAT) + (MAX_MODE_FLOAT - MIN_MODE_FLOAT
 + 1)) : ((enum mode_class) mode_class[from_mode]) == MODE_FLOAT
 ? ((from_mode) - MIN_MODE_FLOAT) : ((fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 348, __FUNCTION__)), 0)]) == &arm_bfloat_half_format &&
 (real_format_for_mode[(((enum mode_class) mode_class[to_mode
]) == MODE_DECIMAL_FLOAT) ? (((to_mode) - MIN_MODE_DECIMAL_FLOAT
) + (MAX_MODE_FLOAT - MIN_MODE_FLOAT + 1)) : ((enum mode_class
) mode_class[to_mode]) == MODE_FLOAT ? ((to_mode) - MIN_MODE_FLOAT
) : ((fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 349, __FUNCTION__)), 0)]) == &ieee_half_format) || ((real_format_for_mode
[(((enum mode_class) mode_class[to_mode]) == MODE_DECIMAL_FLOAT
) ? (((to_mode) - MIN_MODE_DECIMAL_FLOAT) + (MAX_MODE_FLOAT -
 MIN_MODE_FLOAT + 1)) : ((enum mode_class) mode_class[to_mode
]) == MODE_FLOAT ? ((to_mode) - MIN_MODE_FLOAT) : ((fancy_abort
 ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 350, __FUNCTION__)), 0)]) == &arm_bfloat_half_format &&
 (real_format_for_mode[(((enum mode_class) mode_class[from_mode
]) == MODE_DECIMAL_FLOAT) ? (((from_mode) - MIN_MODE_DECIMAL_FLOAT
) + (MAX_MODE_FLOAT - MIN_MODE_FLOAT + 1)) : ((enum mode_class
) mode_class[from_mode]) == MODE_FLOAT ? ((from_mode) - MIN_MODE_FLOAT
) : ((fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 351, __FUNCTION__)), 0)]) == &ieee_half_format)) ? fancy_abort
 ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 351, __FUNCTION__), 0 : 0))
      != DECIMAL_FLOAT_MODE_P (to_mode))((void)(!((GET_MODE_PRECISION (from_mode) != GET_MODE_PRECISION
 (to_mode)) || ((((enum mode_class) mode_class[from_mode]) ==
 MODE_DECIMAL_FLOAT) != (((enum mode_class) mode_class[to_mode
]) == MODE_DECIMAL_FLOAT)) || ((real_format_for_mode[(((enum mode_class
) mode_class[from_mode]) == MODE_DECIMAL_FLOAT) ? (((from_mode
) - MIN_MODE_DECIMAL_FLOAT) + (MAX_MODE_FLOAT - MIN_MODE_FLOAT
 + 1)) : ((enum mode_class) mode_class[from_mode]) == MODE_FLOAT
 ? ((from_mode) - MIN_MODE_FLOAT) : ((fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 348, __FUNCTION__)), 0)]) == &arm_bfloat_half_format &&
 (real_format_for_mode[(((enum mode_class) mode_class[to_mode
]) == MODE_DECIMAL_FLOAT) ? (((to_mode) - MIN_MODE_DECIMAL_FLOAT
) + (MAX_MODE_FLOAT - MIN_MODE_FLOAT + 1)) : ((enum mode_class
) mode_class[to_mode]) == MODE_FLOAT ? ((to_mode) - MIN_MODE_FLOAT
) : ((fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 349, __FUNCTION__)), 0)]) == &ieee_half_format) || ((real_format_for_mode
[(((enum mode_class) mode_class[to_mode]) == MODE_DECIMAL_FLOAT
) ? (((to_mode) - MIN_MODE_DECIMAL_FLOAT) + (MAX_MODE_FLOAT -
 MIN_MODE_FLOAT + 1)) : ((enum mode_class) mode_class[to_mode
]) == MODE_FLOAT ? ((to_mode) - MIN_MODE_FLOAT) : ((fancy_abort
 ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 350, __FUNCTION__)), 0)]) == &arm_bfloat_half_format &&
 (real_format_for_mode[(((enum mode_class) mode_class[from_mode
]) == MODE_DECIMAL_FLOAT) ? (((from_mode) - MIN_MODE_DECIMAL_FLOAT
) + (MAX_MODE_FLOAT - MIN_MODE_FLOAT + 1)) : ((enum mode_class
) mode_class[from_mode]) == MODE_FLOAT ? ((from_mode) - MIN_MODE_FLOAT
) : ((fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 351, __FUNCTION__)), 0)]) == &ieee_half_format)) ? fancy_abort
 ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 351, __FUNCTION__), 0 : 0))
  || (REAL_MODE_FORMAT (from_mode) == &arm_bfloat_half_format((void)(!((GET_MODE_PRECISION (from_mode) != GET_MODE_PRECISION
 (to_mode)) || ((((enum mode_class) mode_class[from_mode]) ==
 MODE_DECIMAL_FLOAT) != (((enum mode_class) mode_class[to_mode
]) == MODE_DECIMAL_FLOAT)) || ((real_format_for_mode[(((enum mode_class
) mode_class[from_mode]) == MODE_DECIMAL_FLOAT) ? (((from_mode
) - MIN_MODE_DECIMAL_FLOAT) + (MAX_MODE_FLOAT - MIN_MODE_FLOAT
 + 1)) : ((enum mode_class) mode_class[from_mode]) == MODE_FLOAT
 ? ((from_mode) - MIN_MODE_FLOAT) : ((fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 348, __FUNCTION__)), 0)]) == &arm_bfloat_half_format &&
 (real_format_for_mode[(((enum mode_class) mode_class[to_mode
]) == MODE_DECIMAL_FLOAT) ? (((to_mode) - MIN_MODE_DECIMAL_FLOAT
) + (MAX_MODE_FLOAT - MIN_MODE_FLOAT + 1)) : ((enum mode_class
) mode_class[to_mode]) == MODE_FLOAT ? ((to_mode) - MIN_MODE_FLOAT
) : ((fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 349, __FUNCTION__)), 0)]) == &ieee_half_format) || ((real_format_for_mode
[(((enum mode_class) mode_class[to_mode]) == MODE_DECIMAL_FLOAT
) ? (((to_mode) - MIN_MODE_DECIMAL_FLOAT) + (MAX_MODE_FLOAT -
 MIN_MODE_FLOAT + 1)) : ((enum mode_class) mode_class[to_mode
]) == MODE_FLOAT ? ((to_mode) - MIN_MODE_FLOAT) : ((fancy_abort
 ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 350, __FUNCTION__)), 0)]) == &arm_bfloat_half_format &&
 (real_format_for_mode[(((enum mode_class) mode_class[from_mode
]) == MODE_DECIMAL_FLOAT) ? (((from_mode) - MIN_MODE_DECIMAL_FLOAT
) + (MAX_MODE_FLOAT - MIN_MODE_FLOAT + 1)) : ((enum mode_class
) mode_class[from_mode]) == MODE_FLOAT ? ((from_mode) - MIN_MODE_FLOAT
) : ((fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 351, __FUNCTION__)), 0)]) == &ieee_half_format)) ? fancy_abort
 ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 351, __FUNCTION__), 0 : 0))
      && REAL_MODE_FORMAT (to_mode) == &ieee_half_format)((void)(!((GET_MODE_PRECISION (from_mode) != GET_MODE_PRECISION
 (to_mode)) || ((((enum mode_class) mode_class[from_mode]) ==
 MODE_DECIMAL_FLOAT) != (((enum mode_class) mode_class[to_mode
]) == MODE_DECIMAL_FLOAT)) || ((real_format_for_mode[(((enum mode_class
) mode_class[from_mode]) == MODE_DECIMAL_FLOAT) ? (((from_mode
) - MIN_MODE_DECIMAL_FLOAT) + (MAX_MODE_FLOAT - MIN_MODE_FLOAT
 + 1)) : ((enum mode_class) mode_class[from_mode]) == MODE_FLOAT
 ? ((from_mode) - MIN_MODE_FLOAT) : ((fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 348, __FUNCTION__)), 0)]) == &arm_bfloat_half_format &&
 (real_format_for_mode[(((enum mode_class) mode_class[to_mode
]) == MODE_DECIMAL_FLOAT) ? (((to_mode) - MIN_MODE_DECIMAL_FLOAT
) + (MAX_MODE_FLOAT - MIN_MODE_FLOAT + 1)) : ((enum mode_class
) mode_class[to_mode]) == MODE_FLOAT ? ((to_mode) - MIN_MODE_FLOAT
) : ((fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 349, __FUNCTION__)), 0)]) == &ieee_half_format) || ((real_format_for_mode
[(((enum mode_class) mode_class[to_mode]) == MODE_DECIMAL_FLOAT
) ? (((to_mode) - MIN_MODE_DECIMAL_FLOAT) + (MAX_MODE_FLOAT -
 MIN_MODE_FLOAT + 1)) : ((enum mode_class) mode_class[to_mode
]) == MODE_FLOAT ? ((to_mode) - MIN_MODE_FLOAT) : ((fancy_abort
 ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 350, __FUNCTION__)), 0)]) == &arm_bfloat_half_format &&
 (real_format_for_mode[(((enum mode_class) mode_class[from_mode
]) == MODE_DECIMAL_FLOAT) ? (((from_mode) - MIN_MODE_DECIMAL_FLOAT
) + (MAX_MODE_FLOAT - MIN_MODE_FLOAT + 1)) : ((enum mode_class
) mode_class[from_mode]) == MODE_FLOAT ? ((from_mode) - MIN_MODE_FLOAT
) : ((fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 351, __FUNCTION__)), 0)]) == &ieee_half_format)) ? fancy_abort
 ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 351, __FUNCTION__), 0 : 0))
  || (REAL_MODE_FORMAT (to_mode) == &arm_bfloat_half_format((void)(!((GET_MODE_PRECISION (from_mode) != GET_MODE_PRECISION
 (to_mode)) || ((((enum mode_class) mode_class[from_mode]) ==
 MODE_DECIMAL_FLOAT) != (((enum mode_class) mode_class[to_mode
]) == MODE_DECIMAL_FLOAT)) || ((real_format_for_mode[(((enum mode_class
) mode_class[from_mode]) == MODE_DECIMAL_FLOAT) ? (((from_mode
) - MIN_MODE_DECIMAL_FLOAT) + (MAX_MODE_FLOAT - MIN_MODE_FLOAT
 + 1)) : ((enum mode_class) mode_class[from_mode]) == MODE_FLOAT
 ? ((from_mode) - MIN_MODE_FLOAT) : ((fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 348, __FUNCTION__)), 0)]) == &arm_bfloat_half_format &&
 (real_format_for_mode[(((enum mode_class) mode_class[to_mode
]) == MODE_DECIMAL_FLOAT) ? (((to_mode) - MIN_MODE_DECIMAL_FLOAT
) + (MAX_MODE_FLOAT - MIN_MODE_FLOAT + 1)) : ((enum mode_class
) mode_class[to_mode]) == MODE_FLOAT ? ((to_mode) - MIN_MODE_FLOAT
) : ((fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 349, __FUNCTION__)), 0)]) == &ieee_half_format) || ((real_format_for_mode
[(((enum mode_class) mode_class[to_mode]) == MODE_DECIMAL_FLOAT
) ? (((to_mode) - MIN_MODE_DECIMAL_FLOAT) + (MAX_MODE_FLOAT -
 MIN_MODE_FLOAT + 1)) : ((enum mode_class) mode_class[to_mode
]) == MODE_FLOAT ? ((to_mode) - MIN_MODE_FLOAT) : ((fancy_abort
 ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 350, __FUNCTION__)), 0)]) == &arm_bfloat_half_format &&
 (real_format_for_mode[(((enum mode_class) mode_class[from_mode
]) == MODE_DECIMAL_FLOAT) ? (((from_mode) - MIN_MODE_DECIMAL_FLOAT
) + (MAX_MODE_FLOAT - MIN_MODE_FLOAT + 1)) : ((enum mode_class
) mode_class[from_mode]) == MODE_FLOAT ? ((from_mode) - MIN_MODE_FLOAT
) : ((fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 351, __FUNCTION__)), 0)]) == &ieee_half_format)) ? fancy_abort
 ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 351, __FUNCTION__), 0 : 0))
      && REAL_MODE_FORMAT (from_mode) == &ieee_half_format))((void)(!((GET_MODE_PRECISION (from_mode) != GET_MODE_PRECISION
 (to_mode)) || ((((enum mode_class) mode_class[from_mode]) ==
 MODE_DECIMAL_FLOAT) != (((enum mode_class) mode_class[to_mode
]) == MODE_DECIMAL_FLOAT)) || ((real_format_for_mode[(((enum mode_class
) mode_class[from_mode]) == MODE_DECIMAL_FLOAT) ? (((from_mode
) - MIN_MODE_DECIMAL_FLOAT) + (MAX_MODE_FLOAT - MIN_MODE_FLOAT
 + 1)) : ((enum mode_class) mode_class[from_mode]) == MODE_FLOAT
 ? ((from_mode) - MIN_MODE_FLOAT) : ((fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 348, __FUNCTION__)), 0)]) == &arm_bfloat_half_format &&
 (real_format_for_mode[(((enum mode_class) mode_class[to_mode
]) == MODE_DECIMAL_FLOAT) ? (((to_mode) - MIN_MODE_DECIMAL_FLOAT
) + (MAX_MODE_FLOAT - MIN_MODE_FLOAT + 1)) : ((enum mode_class
) mode_class[to_mode]) == MODE_FLOAT ? ((to_mode) - MIN_MODE_FLOAT
) : ((fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 349, __FUNCTION__)), 0)]) == &ieee_half_format) || ((real_format_for_mode
[(((enum mode_class) mode_class[to_mode]) == MODE_DECIMAL_FLOAT
) ? (((to_mode) - MIN_MODE_DECIMAL_FLOAT) + (MAX_MODE_FLOAT -
 MIN_MODE_FLOAT + 1)) : ((enum mode_class) mode_class[to_mode
]) == MODE_FLOAT ? ((to_mode) - MIN_MODE_FLOAT) : ((fancy_abort
 ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 350, __FUNCTION__)), 0)]) == &arm_bfloat_half_format &&
 (real_format_for_mode[(((enum mode_class) mode_class[from_mode
]) == MODE_DECIMAL_FLOAT) ? (((from_mode) - MIN_MODE_DECIMAL_FLOAT
) + (MAX_MODE_FLOAT - MIN_MODE_FLOAT + 1)) : ((enum mode_class
) mode_class[from_mode]) == MODE_FLOAT ? ((from_mode) - MIN_MODE_FLOAT
) : ((fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 351, __FUNCTION__)), 0)]) == &ieee_half_format)) ? fancy_abort
 ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 351, __FUNCTION__), 0 : 0));

    if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
/* Conversion between decimal float and binary float, same size.  */
tab = DECIMAL_FLOAT_MODE_P (from_mode)(((enum mode_class) mode_class[from_mode]) == MODE_DECIMAL_FLOAT
) ? trunc_optab : sext_optab;
    else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
tab = sext_optab;
    else
tab = trunc_optab;

    /* Try converting directly if the insn is supported.  */

    code = convert_optab_handler (tab, to_mode, from_mode);
    if (code != CODE_FOR_nothing)
{
 emit_unop_insn (code, to, from,
	  tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
 return;
}

371#ifdef HAVE_SFmode
    if (REAL_MODE_FORMAT (from_mode)(real_format_for_mode[(((enum mode_class) mode_class[from_mode
]) == MODE_DECIMAL_FLOAT) ? (((from_mode) - MIN_MODE_DECIMAL_FLOAT
) + (MAX_MODE_FLOAT - MIN_MODE_FLOAT + 1)) : ((enum mode_class
) mode_class[from_mode]) == MODE_FLOAT ? ((from_mode) - MIN_MODE_FLOAT
) : ((fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 372, __FUNCTION__)), 0)]) == &arm_bfloat_half_format
 && REAL_MODE_FORMAT (SFmode)(real_format_for_mode[(((enum mode_class) mode_class[(scalar_float_mode
 ((scalar_float_mode::from_int) E_SFmode))]) == MODE_DECIMAL_FLOAT
) ? ((((scalar_float_mode ((scalar_float_mode::from_int) E_SFmode
))) - MIN_MODE_DECIMAL_FLOAT) + (MAX_MODE_FLOAT - MIN_MODE_FLOAT
 + 1)) : ((enum mode_class) mode_class[(scalar_float_mode ((scalar_float_mode
::from_int) E_SFmode))]) == MODE_FLOAT ? (((scalar_float_mode
 ((scalar_float_mode::from_int) E_SFmode))) - MIN_MODE_FLOAT)
 : ((fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 373, __FUNCTION__)), 0)]) == &ieee_single_format)
{
 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (SFmode(scalar_float_mode ((scalar_float_mode::from_int) E_SFmode))))
   {
     /* To cut down on libgcc size, implement
 BFmode -> {DF,XF,TF}mode conversions by
 BFmode -> SFmode -> {DF,XF,TF}mode conversions.  */
     rtx temp = gen_reg_rtx (SFmode(scalar_float_mode ((scalar_float_mode::from_int) E_SFmode)));
     convert_mode_scalar (temp, from, unsignedp);
     convert_mode_scalar (to, temp, unsignedp);
     return;
   }
 if (REAL_MODE_FORMAT (to_mode)(real_format_for_mode[(((enum mode_class) mode_class[to_mode]
) == MODE_DECIMAL_FLOAT) ? (((to_mode) - MIN_MODE_DECIMAL_FLOAT
) + (MAX_MODE_FLOAT - MIN_MODE_FLOAT + 1)) : ((enum mode_class
) mode_class[to_mode]) == MODE_FLOAT ? ((to_mode) - MIN_MODE_FLOAT
) : ((fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 385, __FUNCTION__)), 0)]) == &ieee_half_format)
   {
     /* Similarly, implement BFmode -> HFmode as
 BFmode -> SFmode -> HFmode conversion where SFmode
 has superset of BFmode values.  We don't need
 to handle sNaNs by raising exception and turning
 into into qNaN though, as that can be done in the
 SFmode -> HFmode conversion too.  */
     rtx temp = gen_reg_rtx (SFmode(scalar_float_mode ((scalar_float_mode::from_int) E_SFmode)));
     int save_flag_finite_math_only = flag_finite_math_onlyglobal_options.x_flag_finite_math_only;
     flag_finite_math_onlyglobal_options.x_flag_finite_math_only = true;
     convert_mode_scalar (temp, from, unsignedp);
     flag_finite_math_onlyglobal_options.x_flag_finite_math_only = save_flag_finite_math_only;
     convert_mode_scalar (to, temp, unsignedp);
     return;
   }
 if (to_mode == SFmode(scalar_float_mode ((scalar_float_mode::from_int) E_SFmode))
     && !HONOR_NANS (from_mode)
     && !HONOR_NANS (to_mode)
     && optimize_insn_for_speed_p ())
   {
     /* If we don't expect sNaNs, for BFmode -> SFmode we can just
 shift the bits up.  */
     machine_mode fromi_mode, toi_mode;
     if (int_mode_for_size (GET_MODE_BITSIZE (from_mode),
		     0).exists (&fromi_mode)
  && int_mode_for_size (GET_MODE_BITSIZE (to_mode),
			0).exists (&toi_mode))
{
  start_sequence ();
  rtx fromi = lowpart_subreg (fromi_mode, from, from_mode);
  rtx tof = NULL_RTX(rtx) 0;
  if (fromi)
    {
      rtx toi;
      if (GET_MODE (fromi)((machine_mode) (fromi)->mode) == VOIDmode((void) 0, E_VOIDmode))
	toi = simplify_unary_operation (ZERO_EXTEND, toi_mode,
					fromi, fromi_mode);
      else
	{
	  toi = gen_reg_rtx (toi_mode);
	  convert_mode_scalar (toi, fromi, 1);
	}
      toi
	= maybe_expand_shift (LSHIFT_EXPR, toi_mode, toi,
			      GET_MODE_PRECISION (to_mode)
			      - GET_MODE_PRECISION (from_mode),
			      NULL_RTX(rtx) 0, 1);
      if (toi)
	{
	  tof = lowpart_subreg (to_mode, toi, toi_mode);
	  if (tof)
	    emit_move_insn (to, tof);
	}
    }
  insns = get_insns ();
  end_sequence ();
  if (tof)
    {
      emit_insn (insns);
      return;
    }
}
   }
}
    if (REAL_MODE_FORMAT (from_mode)(real_format_for_mode[(((enum mode_class) mode_class[from_mode
]) == MODE_DECIMAL_FLOAT) ? (((from_mode) - MIN_MODE_DECIMAL_FLOAT
) + (MAX_MODE_FLOAT - MIN_MODE_FLOAT + 1)) : ((enum mode_class
) mode_class[from_mode]) == MODE_FLOAT ? ((from_mode) - MIN_MODE_FLOAT
) : ((fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 450, __FUNCTION__)), 0)]) == &ieee_single_format
 && REAL_MODE_FORMAT (to_mode)(real_format_for_mode[(((enum mode_class) mode_class[to_mode]
) == MODE_DECIMAL_FLOAT) ? (((to_mode) - MIN_MODE_DECIMAL_FLOAT
) + (MAX_MODE_FLOAT - MIN_MODE_FLOAT + 1)) : ((enum mode_class
) mode_class[to_mode]) == MODE_FLOAT ? ((to_mode) - MIN_MODE_FLOAT
) : ((fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 451, __FUNCTION__)), 0)]) == &arm_bfloat_half_format
 && !HONOR_NANS (from_mode)
 && !HONOR_NANS (to_mode)
 && !flag_rounding_mathglobal_options.x_flag_rounding_math
 && optimize_insn_for_speed_p ())
{
 /* If we don't expect qNaNs nor sNaNs and can assume rounding
    to nearest, we can expand the conversion inline as
    (fromi + 0x7fff + ((fromi >> 16) & 1)) >> 16.  */
 machine_mode fromi_mode, toi_mode;
 if (int_mode_for_size (GET_MODE_BITSIZE (from_mode),
		 0).exists (&fromi_mode)
     && int_mode_for_size (GET_MODE_BITSIZE (to_mode),
		    0).exists (&toi_mode))
   {
     start_sequence ();
     rtx fromi = lowpart_subreg (fromi_mode, from, from_mode);
     rtx tof = NULL_RTX(rtx) 0;
     do
{
  if (!fromi)
    break;
  int shift = (GET_MODE_PRECISION (from_mode)
	       - GET_MODE_PRECISION (to_mode));
  rtx temp1
    = maybe_expand_shift (RSHIFT_EXPR, fromi_mode, fromi,
			  shift, NULL_RTX(rtx) 0, 1);
  if (!temp1)
    break;
  rtx temp2
    = expand_binop (fromi_mode, and_optab, temp1, const1_rtx(const_int_rtx[64 +1]),
		    NULL_RTX(rtx) 0, 1, OPTAB_DIRECT);
  if (!temp2)
    break;
  rtx temp3
    = expand_binop (fromi_mode, add_optab, fromi,
		    gen_int_mode ((HOST_WIDE_INT_1U1UL
				   << (shift - 1)) - 1,
				  fromi_mode), NULL_RTX(rtx) 0,
		    1, OPTAB_DIRECT);
  if (!temp3)
    break;
  rtx temp4
    = expand_binop (fromi_mode, add_optab, temp3, temp2,
		    NULL_RTX(rtx) 0, 1, OPTAB_DIRECT);
  if (!temp4)
    break;
  rtx temp5 = maybe_expand_shift (RSHIFT_EXPR, fromi_mode,
				  temp4, shift, NULL_RTX(rtx) 0, 1);
  if (!temp5)
    break;
  rtx temp6 = lowpart_subreg (toi_mode, temp5, fromi_mode);
  if (!temp6)
    break;
  tof = lowpart_subreg (to_mode, force_reg (toi_mode, temp6),
			toi_mode);
  if (tof)
    emit_move_insn (to, tof);
}
     while (0);
     insns = get_insns ();
     end_sequence ();
     if (tof)
{
  emit_insn (insns);
  return;
}
   }
}
520#endif

    /* Otherwise use a libcall.  */
    libcall = convert_optab_libfunc (tab, to_mode, from_mode);

    /* Is this conversion implemented yet?  */
    gcc_assert (libcall)((void)(!(libcall) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 526, __FUNCTION__), 0 : 0));

    start_sequence ();
    value = emit_library_call_value (libcall, NULL_RTX(rtx) 0, LCT_CONST, to_mode,
		       from, from_mode);
    insns = get_insns ();
    end_sequence ();
    emit_libcall_block (insns, to, value,
	  tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,gen_rtx_fmt_e_stat ((FLOAT_TRUNCATE), ((to_mode)), ((from)) )
						       from)gen_rtx_fmt_e_stat ((FLOAT_TRUNCATE), ((to_mode)), ((from)) )
	  : gen_rtx_FLOAT_EXTEND (to_mode, from)gen_rtx_fmt_e_stat ((FLOAT_EXTEND), ((to_mode)), ((from)) ));
    return;
  }

/* Handle pointer conversion.  */			/* SPEE 900220.  */
/* If the target has a converter from FROM_MODE to TO_MODE, use it.  */
{
  convert_optab ctab;

  if (GET_MODE_PRECISION (from_mode) > GET_MODE_PRECISION (to_mode))
    ctab = trunc_optab;
  else if (unsignedp)
    ctab = zext_optab;
  else
    ctab = sext_optab;

  if (convert_optab_handler (ctab, to_mode, from_mode)
!= CODE_FOR_nothing)
    {
emit_unop_insn (convert_optab_handler (ctab, to_mode, from_mode),
	to, from, UNKNOWN);
return;
    }
}

/* Targets are expected to provide conversion insns between PxImode and
   xImode for all MODE_PARTIAL_INT modes they use, but no others.  */
if (GET_MODE_CLASS (to_mode)((enum mode_class) mode_class[to_mode]) == MODE_PARTIAL_INT)
  {
    scalar_int_mode full_mode
= smallest_int_mode_for_size (GET_MODE_BITSIZE (to_mode));

    gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)((void)(!(convert_optab_handler (trunc_optab, to_mode, full_mode
) != CODE_FOR_nothing) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 569, __FUNCTION__), 0 : 0))
  != CODE_FOR_nothing)((void)(!(convert_optab_handler (trunc_optab, to_mode, full_mode
) != CODE_FOR_nothing) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 569, __FUNCTION__), 0 : 0));

    if (full_mode != from_mode)
from = convert_to_mode (full_mode, from, unsignedp);
    emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
      to, from, UNKNOWN);
    return;
  }
if (GET_MODE_CLASS (from_mode)((enum mode_class) mode_class[from_mode]) == MODE_PARTIAL_INT)
  {
    rtx new_from;
    scalar_int_mode full_mode
= smallest_int_mode_for_size (GET_MODE_BITSIZE (from_mode));
    convert_optab ctab = unsignedp ? zext_optab : sext_optab;
    enum insn_code icode;

    icode = convert_optab_handler (ctab, full_mode, from_mode);
    gcc_assert (icode != CODE_FOR_nothing)((void)(!(icode != CODE_FOR_nothing) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 586, __FUNCTION__), 0 : 0));

    if (to_mode == full_mode)
{
 emit_unop_insn (icode, to, from, UNKNOWN);
 return;
}

    new_from = gen_reg_rtx (full_mode);
    emit_unop_insn (icode, new_from, from, UNKNOWN);

    /* else proceed to integer conversions below.  */
    from_mode = full_mode;
    from = new_from;
  }

 /* Make sure both are fixed-point modes or both are not.  */
 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==((void)(!((((((enum mode_class) mode_class[from_mode]) == MODE_FRACT
) || (((enum mode_class) mode_class[from_mode]) == MODE_ACCUM
)) || ((((enum mode_class) mode_class[from_mode]) == MODE_UFRACT
) || (((enum mode_class) mode_class[from_mode]) == MODE_UACCUM
))) == (((((enum mode_class) mode_class[to_mode]) == MODE_FRACT
) || (((enum mode_class) mode_class[to_mode]) == MODE_ACCUM))
 || ((((enum mode_class) mode_class[to_mode]) == MODE_UFRACT)
 || (((enum mode_class) mode_class[to_mode]) == MODE_UACCUM))
)) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 604, __FUNCTION__), 0 : 0))
      ALL_SCALAR_FIXED_POINT_MODE_P (to_mode))((void)(!((((((enum mode_class) mode_class[from_mode]) == MODE_FRACT
) || (((enum mode_class) mode_class[from_mode]) == MODE_ACCUM
)) || ((((enum mode_class) mode_class[from_mode]) == MODE_UFRACT
) || (((enum mode_class) mode_class[from_mode]) == MODE_UACCUM
))) == (((((enum mode_class) mode_class[to_mode]) == MODE_FRACT
) || (((enum mode_class) mode_class[to_mode]) == MODE_ACCUM))
 || ((((enum mode_class) mode_class[to_mode]) == MODE_UFRACT)
 || (((enum mode_class) mode_class[to_mode]) == MODE_UACCUM))
)) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 604, __FUNCTION__), 0 : 0));
 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode)(((((enum mode_class) mode_class[from_mode]) == MODE_FRACT) ||
 (((enum mode_class) mode_class[from_mode]) == MODE_ACCUM)) ||
 ((((enum mode_class) mode_class[from_mode]) == MODE_UFRACT) ||
 (((enum mode_class) mode_class[from_mode]) == MODE_UACCUM))))
  {
    /* If we widen from_mode to to_mode and they are in the same class,
we won't saturate the result.
Otherwise, always saturate the result to play safe.  */
    if (GET_MODE_CLASS (from_mode)((enum mode_class) mode_class[from_mode]) == GET_MODE_CLASS (to_mode)((enum mode_class) mode_class[to_mode])
 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
expand_fixed_convert (to, from, 0, 0);
    else
expand_fixed_convert (to, from, 0, 1);
    return;
  }

/* Now both modes are integers.  */

/* Handle expanding beyond a word.  */
if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
    && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4)))
  {
    rtx_insn *insns;
    rtx lowpart;
    rtx fill_value;
    rtx lowfrom;
    int i;
    scalar_mode lowpart_mode;
    int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD)(((GET_MODE_SIZE (to_mode)) + ((((global_options.x_ix86_isa_flags
 & (1UL << 1)) != 0) ? 8 : 4)) - 1) / ((((global_options
.x_ix86_isa_flags & (1UL << 1)) != 0) ? 8 : 4)));

    /* Try converting directly if the insn is supported.  */
    if ((code = can_extend_p (to_mode, from_mode, unsignedp))
 != CODE_FOR_nothing)
{
 /* If FROM is a SUBREG, put it into a register.  Do this
    so that we always generate the same set of insns for
    better cse'ing; if an intermediate assignment occurred,
    we won't be doing the operation directly on the SUBREG.  */
 if (optimizeglobal_options.x_optimize > 0 && GET_CODE (from)((enum rtx_code) (from)->code) == SUBREG)
   from = force_reg (from_mode, from);
 emit_unop_insn (code, to, from, equiv_code);
 return;
}
    /* Next, try converting via full word.  */
    else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4))
      && ((code = can_extend_p (to_mode, word_mode, unsignedp))
   != CODE_FOR_nothing))
{
 rtx word_to = gen_reg_rtx (word_mode);
 if (REG_P (to)(((enum rtx_code) (to)->code) == REG))
   {
     if (reg_overlap_mentioned_p (to, from))
from = force_reg (from_mode, from);
     emit_clobber (to);
   }
 convert_move (word_to, from, unsignedp);
 emit_unop_insn (code, to, word_to, equiv_code);
 return;
}

    /* No special multiword conversion insn; do it by hand.  */
    start_sequence ();

    /* Since we will turn this into a no conflict block, we must ensure
       the source does not overlap the target so force it into an isolated
       register when maybe so.  Likewise for any MEM input, since the
       conversion sequence might require several references to it and we
       must ensure we're getting the same value every time.  */

    if (MEM_P (from)(((enum rtx_code) (from)->code) == MEM) || reg_overlap_mentioned_p (to, from))
from = force_reg (from_mode, from);

    /* Get a copy of FROM widened to a word, if necessary.  */
    if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4)))
lowpart_mode = word_mode;
    else
lowpart_mode = from_mode;

    lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);

    lowpart = gen_lowpartrtl_hooks.gen_lowpart (lowpart_mode, to);
    emit_move_insn (lowpart, lowfrom);

    /* Compute the value to put in each remaining word.  */
    if (unsignedp)
fill_value = const0_rtx(const_int_rtx[64]);
    else
fill_value = emit_store_flag_force (gen_reg_rtx (word_mode),
			    LT, lowfrom, const0_rtx(const_int_rtx[64]),
			    lowpart_mode, 0, -1);

    /* Fill the remaining words.  */
    for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD(((global_options.x_ix86_isa_flags & (1UL << 1)) !=
 0) ? 8 : 4); i < nwords; i++)
{
 int index = (WORDS_BIG_ENDIAN0 ? nwords - i - 1 : i);
 rtx subword = operand_subword (to, index, 1, to_mode);

 gcc_assert (subword)((void)(!(subword) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 699, __FUNCTION__), 0 : 0));

 if (fill_value != subword)
   emit_move_insn (subword, fill_value);
}

    insns = get_insns ();
    end_sequence ();

    emit_insn (insns);
    return;
  }

/* Truncating multi-word to a word or less.  */
if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4))
    && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4)))
  {
    if (!((MEM_P (from)(((enum rtx_code) (from)->code) == MEM)
    && ! MEM_VOLATILE_P (from)(__extension__ ({ __typeof ((from)) const _rtx = ((from)); if
 (((enum rtx_code) (_rtx)->code) != MEM && ((enum rtx_code
) (_rtx)->code) != ASM_OPERANDS && ((enum rtx_code
) (_rtx)->code) != ASM_INPUT) rtl_check_failed_flag ("MEM_VOLATILE_P"
, _rtx, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 717, __FUNCTION__); _rtx; })->volatil)
    && direct_load(this_target_regs->x_direct_load)[(int) to_mode]
    && ! mode_dependent_address_p (XEXP (from, 0)(((from)->u.fld[0]).rt_rtx),
			    MEM_ADDR_SPACE (from)(get_mem_attrs (from)->addrspace)))
   || REG_P (from)(((enum rtx_code) (from)->code) == REG)
   || GET_CODE (from)((enum rtx_code) (from)->code) == SUBREG))
from = force_reg (from_mode, from);
    convert_move (to, gen_lowpartrtl_hooks.gen_lowpart (word_mode, from), 0);
    return;
  }

/* Now follow all the conversions between integers
   no more than a word long.  */

/* For truncation, usually we can just refer to FROM in a narrower mode.  */
if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
    && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode)(targetm.truly_noop_truncation (GET_MODE_PRECISION (to_mode),
 GET_MODE_PRECISION (from_mode))))
  {
    if (!((MEM_P (from)(((enum rtx_code) (from)->code) == MEM)
    && ! MEM_VOLATILE_P (from)(__extension__ ({ __typeof ((from)) const _rtx = ((from)); if
 (((enum rtx_code) (_rtx)->code) != MEM && ((enum rtx_code
) (_rtx)->code) != ASM_OPERANDS && ((enum rtx_code
) (_rtx)->code) != ASM_INPUT) rtl_check_failed_flag ("MEM_VOLATILE_P"
, _rtx, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 736, __FUNCTION__); _rtx; })->volatil)
    && direct_load(this_target_regs->x_direct_load)[(int) to_mode]
    && ! mode_dependent_address_p (XEXP (from, 0)(((from)->u.fld[0]).rt_rtx),
			    MEM_ADDR_SPACE (from)(get_mem_attrs (from)->addrspace)))
   || REG_P (from)(((enum rtx_code) (from)->code) == REG)
   || GET_CODE (from)((enum rtx_code) (from)->code) == SUBREG))
from = force_reg (from_mode, from);
    if (REG_P (from)(((enum rtx_code) (from)->code) == REG) && REGNO (from)(rhs_regno(from)) < FIRST_PSEUDO_REGISTER76
 && !targetm.hard_regno_mode_ok (REGNO (from)(rhs_regno(from)), to_mode))
from = copy_to_reg (from);
    emit_move_insn (to, gen_lowpartrtl_hooks.gen_lowpart (to_mode, from));
    return;
  }

/* Handle extension.  */
if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
  {
    /* Convert directly if that works.  */
    if ((code = can_extend_p (to_mode, from_mode, unsignedp))
 != CODE_FOR_nothing)
{
 emit_unop_insn (code, to, from, equiv_code);
 return;
}
    else
{
 rtx tmp;
 int shift_amount;

 /* Search for a mode to convert via.  */
 opt_scalar_mode intermediate_iter;
 FOR_EACH_MODE_FROM (intermediate_iter, from_mode)for ((intermediate_iter) = (from_mode); mode_iterator::iterate_p
 (&(intermediate_iter)); mode_iterator::get_next (&(intermediate_iter
)))
   {
     scalar_mode intermediate = intermediate_iter.require ();
     if (((can_extend_p (to_mode, intermediate, unsignedp)
    != CODE_FOR_nothing)
   || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
       && TRULY_NOOP_TRUNCATION_MODES_P (to_mode,(targetm.truly_noop_truncation (GET_MODE_PRECISION (to_mode),
 GET_MODE_PRECISION (intermediate)))
					 intermediate)(targetm.truly_noop_truncation (GET_MODE_PRECISION (to_mode),
 GET_MODE_PRECISION (intermediate)))))
  && (can_extend_p (intermediate, from_mode, unsignedp)
      != CODE_FOR_nothing))
{
  convert_move (to, convert_to_mode (intermediate, from,
				     unsignedp), unsignedp);
  return;
}
   }

 /* No suitable intermediate mode.
    Generate what we need with	shifts.  */
 shift_amount = (GET_MODE_PRECISION (to_mode)
	  - GET_MODE_PRECISION (from_mode));
 from = gen_lowpartrtl_hooks.gen_lowpart (to_mode, force_reg (from_mode, from));
 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
	      to, unsignedp);
 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
	      to, unsignedp);
 if (tmp != to)
   emit_move_insn (to, tmp);
 return;
}
  }

/* Support special truncate insns for certain modes.  */
if (convert_optab_handler (trunc_optab, to_mode,
	     from_mode) != CODE_FOR_nothing)
  {
    emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
      to, from, UNKNOWN);
    return;
  }

/* Handle truncation of volatile memrefs, and so on;
   the things that couldn't be truncated directly,
   and for which there was no special instruction.

   ??? Code above formerly short-circuited this, for most integer
   mode pairs, with a force_reg in from_mode followed by a recursive
   call to this routine.  Appears always to have been wrong.  */
if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
  {
    rtx temp = force_reg (to_mode, gen_lowpartrtl_hooks.gen_lowpart (to_mode, from));
    emit_move_insn (to, temp);
    return;
  }

/* Mode combination is not recognized.  */
gcc_unreachable ()(fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 823, __FUNCTION__));
824}

826/* Return an rtx for a value that would result
 from converting X to mode MODE.
 Both X and MODE may be floating, or both integer.
 UNSIGNEDP is nonzero if X is an unsigned value.
 This can be done by referring to a part of X in place
 or by copying to a new temporary with conversion.  */

833rtx
834convert_to_mode (machine_mode mode, rtx x, int unsignedp)
835{
return convert_modes (mode, VOIDmode((void) 0, E_VOIDmode), x, unsignedp);
837}

839/* Return an rtx for a value that would result
 from converting X from mode OLDMODE to mode MODE.
 Both modes may be floating, or both integer.
 UNSIGNEDP is nonzero if X is an unsigned value.

 This can be done by referring to a part of X in place
 or by copying to a new temporary with conversion.

 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode.  */

849rtx
850convert_modes (machine_mode mode, machine_mode oldmode, rtx x, int unsignedp)
851{
rtx temp;
scalar_int_mode int_mode;

/* If FROM is a SUBREG that indicates that we have already done at least
   the required extension, strip it.  */

if (GET_CODE (x)((enum rtx_code) (x)->code) == SUBREG
    && SUBREG_PROMOTED_VAR_P (x)(__extension__ ({ __typeof ((x)) const _rtx = ((x)); if (((enum
 rtx_code) (_rtx)->code) != SUBREG) rtl_check_failed_flag (
"SUBREG_PROMOTED", _rtx, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 859, __FUNCTION__); _rtx; })->in_struct)
    && is_a <scalar_int_mode> (mode, &int_mode)
    && (GET_MODE_PRECISION (subreg_promoted_mode (x))
 >= GET_MODE_PRECISION (int_mode))
    && SUBREG_CHECK_PROMOTED_SIGN (x, unsignedp)((unsignedp) == SRP_POINTER ? (2 * (__extension__ ({ __typeof
 ((x)) const _rtx = ((x)); if (((enum rtx_code) (_rtx)->code
) != SUBREG) rtl_check_failed_flag ("SUBREG_PROMOTED_GET", _rtx
, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 863, __FUNCTION__); _rtx; })->volatil) + (x)->unchanging
 - 1) == SRP_POINTER : (unsignedp) == SRP_SIGNED ? (__extension__
 ({ __typeof ((x)) const _rtx = ((x)); if (((enum rtx_code) (
_rtx)->code) != SUBREG) rtl_check_failed_flag ("SUBREG_PROMOTED_SIGNED_P"
, _rtx, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 863, __FUNCTION__); _rtx; })->unchanging) : (__extension__
 ({ __typeof ((x)) const _rtx = ((x)); if (((enum rtx_code) (
_rtx)->code) != SUBREG) rtl_check_failed_flag ("SUBREG_PROMOTED_UNSIGNED_P"
, _rtx, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 863, __FUNCTION__); _rtx; })->volatil)))
  {
    scalar_int_mode int_orig_mode;
    scalar_int_mode int_inner_mode;
    machine_mode orig_mode = GET_MODE (x)((machine_mode) (x)->mode);
    x = gen_lowpartrtl_hooks.gen_lowpart (int_mode, SUBREG_REG (x)(((x)->u.fld[0]).rt_rtx));

    /* Preserve SUBREG_PROMOTED_VAR_P if the new mode is wider than
the original mode, but narrower than the inner mode.  */
    if (GET_CODE (x)((enum rtx_code) (x)->code) == SUBREG
 && is_a <scalar_int_mode> (orig_mode, &int_orig_mode)
 && GET_MODE_PRECISION (int_mode)
    > GET_MODE_PRECISION (int_orig_mode)
 && is_a <scalar_int_mode> (GET_MODE (SUBREG_REG (x))((machine_mode) ((((x)->u.fld[0]).rt_rtx))->mode),
		     &int_inner_mode)
 && GET_MODE_PRECISION (int_inner_mode)
    > GET_MODE_PRECISION (int_mode))
{
 SUBREG_PROMOTED_VAR_P (x)(__extension__ ({ __typeof ((x)) const _rtx = ((x)); if (((enum
 rtx_code) (_rtx)->code) != SUBREG) rtl_check_failed_flag (
"SUBREG_PROMOTED", _rtx, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 881, __FUNCTION__); _rtx; })->in_struct) = 1;
 SUBREG_PROMOTED_SET (x, unsignedp)do { rtx const _rtx = __extension__ ({ __typeof ((x)) const _rtx
 = ((x)); if (((enum rtx_code) (_rtx)->code) != SUBREG) rtl_check_failed_flag
 ("SUBREG_PROMOTED_SET", _rtx, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 882, __FUNCTION__); _rtx; }); switch (unsignedp) { case SRP_POINTER
: _rtx->volatil = 0; _rtx->unchanging = 0; break; case SRP_SIGNED
: _rtx->volatil = 0; _rtx->unchanging = 1; break; case SRP_UNSIGNED
: _rtx->volatil = 1; _rtx->unchanging = 0; break; case SRP_SIGNED_AND_UNSIGNED
: _rtx->volatil = 1; _rtx->unchanging = 1; break; } } while
 (0);
}
  }

if (GET_MODE (x)((machine_mode) (x)->mode) != VOIDmode((void) 0, E_VOIDmode))
  oldmode = GET_MODE (x)((machine_mode) (x)->mode);

if (mode == oldmode)
  return x;

if (CONST_SCALAR_INT_P (x)((((enum rtx_code) (x)->code) == CONST_INT) || (((enum rtx_code
) (x)->code) == CONST_WIDE_INT))
    && is_a <scalar_int_mode> (mode, &int_mode))
  {
    /* If the caller did not tell us the old mode, then there is not
much to do with respect to canonicalization.  We have to
assume that all the bits are significant.  */
    if (!is_a <scalar_int_mode> (oldmode))
oldmode = MAX_MODE_INT;
    wide_int w = wide_int::from (rtx_mode_t (x, oldmode),
		   GET_MODE_PRECISION (int_mode),
		   unsignedp ? UNSIGNED : SIGNED);
    return immed_wide_int_const (w, int_mode);
  }

/* We can do this with a gen_lowpart if both desired and current modes
   are integer, and this is either a constant integer, a register, or a
   non-volatile MEM. */
scalar_int_mode int_oldmode;
if (is_int_mode (mode, &int_mode)
    && is_int_mode (oldmode, &int_oldmode)
    && GET_MODE_PRECISION (int_mode) <= GET_MODE_PRECISION (int_oldmode)
    && ((MEM_P (x)(((enum rtx_code) (x)->code) == MEM) && !MEM_VOLATILE_P (x)(__extension__ ({ __typeof ((x)) const _rtx = ((x)); if (((enum
 rtx_code) (_rtx)->code) != MEM && ((enum rtx_code
) (_rtx)->code) != ASM_OPERANDS && ((enum rtx_code
) (_rtx)->code) != ASM_INPUT) rtl_check_failed_flag ("MEM_VOLATILE_P"
, _rtx, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 913, __FUNCTION__); _rtx; })->volatil) && direct_load(this_target_regs->x_direct_load)[(int) int_mode])
 || CONST_POLY_INT_P (x)(1 > 1 && ((enum rtx_code) (x)->code) == CONST_POLY_INT
)
        || (REG_P (x)(((enum rtx_code) (x)->code) == REG)
            && (!HARD_REGISTER_P (x)((((rhs_regno(x))) < 76))
  || targetm.hard_regno_mode_ok (REGNO (x)(rhs_regno(x)), int_mode))
            && TRULY_NOOP_TRUNCATION_MODES_P (int_mode, GET_MODE (x))(targetm.truly_noop_truncation (GET_MODE_PRECISION (int_mode)
, GET_MODE_PRECISION (((machine_mode) (x)->mode)))))))
 return gen_lowpartrtl_hooks.gen_lowpart (int_mode, x);

/* Converting from integer constant into mode is always equivalent to an
   subreg operation.  */
if (VECTOR_MODE_P (mode)(((enum mode_class) mode_class[mode]) == MODE_VECTOR_BOOL || (
(enum mode_class) mode_class[mode]) == MODE_VECTOR_INT || ((enum
 mode_class) mode_class[mode]) == MODE_VECTOR_FLOAT || ((enum
 mode_class) mode_class[mode]) == MODE_VECTOR_FRACT || ((enum
 mode_class) mode_class[mode]) == MODE_VECTOR_UFRACT || ((enum
 mode_class) mode_class[mode]) == MODE_VECTOR_ACCUM || ((enum
 mode_class) mode_class[mode]) == MODE_VECTOR_UACCUM) && GET_MODE (x)((machine_mode) (x)->mode) == VOIDmode((void) 0, E_VOIDmode))
  {
    gcc_assert (known_eq (GET_MODE_BITSIZE (mode),((void)(!((!maybe_ne (GET_MODE_BITSIZE (mode), GET_MODE_BITSIZE
 (oldmode)))) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 926, __FUNCTION__), 0 : 0))
	    GET_MODE_BITSIZE (oldmode)))((void)(!((!maybe_ne (GET_MODE_BITSIZE (mode), GET_MODE_BITSIZE
 (oldmode)))) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 926, __FUNCTION__), 0 : 0));
    return simplify_gen_subreg (mode, x, oldmode, 0);
  }

temp = gen_reg_rtx (mode);
convert_move (temp, x, unsignedp);
return temp;
933}

935/* Variant of convert_modes for ABI parameter passing/return.
 Return an rtx for a value that would result from converting X from
 a floating point mode FMODE to wider integer mode MODE.  */

939rtx
940convert_float_to_wider_int (machine_mode mode, machine_mode fmode, rtx x)
941{
gcc_assert (SCALAR_INT_MODE_P (mode) && SCALAR_FLOAT_MODE_P (fmode))((void)(!((((enum mode_class) mode_class[mode]) == MODE_INT ||
 ((enum mode_class) mode_class[mode]) == MODE_PARTIAL_INT) &&
 (((enum mode_class) mode_class[fmode]) == MODE_FLOAT || ((enum
 mode_class) mode_class[fmode]) == MODE_DECIMAL_FLOAT)) ? fancy_abort
 ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 942, __FUNCTION__), 0 : 0));
scalar_int_mode tmp_mode = int_mode_for_mode (fmode).require ();
rtx tmp = force_reg (tmp_mode, gen_lowpartrtl_hooks.gen_lowpart (tmp_mode, x));
return convert_modes (mode, tmp_mode, tmp, 1);
946}

948/* Variant of convert_modes for ABI parameter passing/return.
 Return an rtx for a value that would result from converting X from
 an integer mode IMODE to a narrower floating point mode MODE.  */

952rtx
953convert_wider_int_to_float (machine_mode mode, machine_mode imode, rtx x)
954{
gcc_assert (SCALAR_FLOAT_MODE_P (mode) && SCALAR_INT_MODE_P (imode))((void)(!((((enum mode_class) mode_class[mode]) == MODE_FLOAT
 || ((enum mode_class) mode_class[mode]) == MODE_DECIMAL_FLOAT
) && (((enum mode_class) mode_class[imode]) == MODE_INT
 || ((enum mode_class) mode_class[imode]) == MODE_PARTIAL_INT
)) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 955, __FUNCTION__), 0 : 0));
scalar_int_mode tmp_mode = int_mode_for_mode (mode).require ();
rtx tmp = force_reg (tmp_mode, gen_lowpartrtl_hooks.gen_lowpart (tmp_mode, x));
return gen_lowpart_SUBREG (mode, tmp);
959}
960
961/* Return the largest alignment we can use for doing a move (or store)
 of MAX_PIECES.  ALIGN is the largest alignment we could use.  */

964static unsigned int
965alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
966{
scalar_int_mode tmode
  = int_mode_for_size (max_pieces * BITS_PER_UNIT(8), 0).require ();

if (align >= GET_MODE_ALIGNMENT (tmode)get_mode_alignment (tmode))
  align = GET_MODE_ALIGNMENT (tmode)get_mode_alignment (tmode);
else
  {
    scalar_int_mode xmode = NARROWEST_INT_MODE(scalar_int_mode (scalar_int_mode::from_int (class_narrowest_mode
[MODE_INT])));
    opt_scalar_int_mode mode_iter;
    FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)for (mode_iterator::start (&(mode_iter), MODE_INT); mode_iterator
::iterate_p (&(mode_iter)); mode_iterator::get_next (&
(mode_iter)))
{
 tmode = mode_iter.require ();
 if (GET_MODE_SIZE (tmode) > max_pieces
     || targetm.slow_unaligned_access (tmode, align))
   break;
 xmode = tmode;
}

    align = MAX (align, GET_MODE_ALIGNMENT (xmode))((align) > (get_mode_alignment (xmode)) ? (align) : (get_mode_alignment
 (xmode)));
  }

return align;
989}

991/* Return the widest QI vector, if QI_MODE is true, or integer mode
 that is narrower than SIZE bytes.  */

994static fixed_size_mode
995widest_fixed_size_mode_for_size (unsigned int size, bool qi_vector)
996{
fixed_size_mode result = NARROWEST_INT_MODE(scalar_int_mode (scalar_int_mode::from_int (class_narrowest_mode
[MODE_INT])));

gcc_checking_assert (size > 1)((void)(!(size > 1) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 999, __FUNCTION__), 0 : 0));

/* Use QI vector only if size is wider than a WORD.  */
if (qi_vector && size > UNITS_PER_WORD(((global_options.x_ix86_isa_flags & (1UL << 1)) !=
 0) ? 8 : 4))
  {
    machine_mode mode;
    fixed_size_mode candidate;
    FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_INT)for (mode_iterator::start (&(mode), MODE_VECTOR_INT); mode_iterator
::iterate_p (&(mode)); mode_iterator::get_next (&(mode
)))
if (is_a<fixed_size_mode> (mode, &candidate)
   && GET_MODE_INNER (candidate)(mode_to_inner (candidate)) == QImode(scalar_int_mode ((scalar_int_mode::from_int) E_QImode)))
 {
   if (GET_MODE_SIZE (candidate) >= size)
     break;
   if (optab_handler (vec_duplicate_optab, candidate)
!= CODE_FOR_nothing)
     result = candidate;
 }

    if (result != NARROWEST_INT_MODE(scalar_int_mode (scalar_int_mode::from_int (class_narrowest_mode
[MODE_INT]))))
return result;
  }

opt_scalar_int_mode tmode;
FOR_EACH_MODE_IN_CLASS (tmode, MODE_INT)for (mode_iterator::start (&(tmode), MODE_INT); mode_iterator
::iterate_p (&(tmode)); mode_iterator::get_next (&(tmode
)))
  if (GET_MODE_SIZE (tmode.require ()) < size)
    result = tmode.require ();

return result;
1027}

1029/* Determine whether an operation OP on LEN bytes with alignment ALIGN can
 and should be performed piecewise.  */

1032static bool
1033can_do_by_pieces (unsigned HOST_WIDE_INTlong len, unsigned int align,
  enum by_pieces_operation op)
1035{
return targetm.use_by_pieces_infrastructure_p (len, align, op,
				 optimize_insn_for_speed_p ());
1038}

1040/* Determine whether the LEN bytes can be moved by using several move
 instructions.  Return nonzero if a call to move_by_pieces should
 succeed.  */

1044bool
1045can_move_by_pieces (unsigned HOST_WIDE_INTlong len, unsigned int align)
1046{
return can_do_by_pieces (len, align, MOVE_BY_PIECES);
1048}

1050/* Return number of insns required to perform operation OP by pieces
 for L bytes.  ALIGN (in bits) is maximum alignment we can assume.  */

1053unsigned HOST_WIDE_INTlong
1054by_pieces_ninsns (unsigned HOST_WIDE_INTlong l, unsigned int align,
  unsigned int max_size, by_pieces_operation op)
1056{
unsigned HOST_WIDE_INTlong n_insns = 0;
fixed_size_mode mode;

if (targetm.overlap_op_by_pieces_p () && op != COMPARE_BY_PIECES)
  {
    /* NB: Round up L and ALIGN to the widest integer mode for
MAX_SIZE.  */
    mode = widest_fixed_size_mode_for_size (max_size,
			      op == SET_BY_PIECES);
    if (optab_handler (mov_optab, mode) != CODE_FOR_nothing)
{
 unsigned HOST_WIDE_INTlong up = ROUND_UP (l, GET_MODE_SIZE (mode))(((l) + (GET_MODE_SIZE (mode)) - 1) & ~((GET_MODE_SIZE (mode
)) - 1));
 if (up > l)
   l = up;
 align = GET_MODE_ALIGNMENT (mode)get_mode_alignment (mode);
}
  }

align = alignment_for_piecewise_move (MOVE_MAX_PIECES((((global_options.x_ix86_isa_flags & (1UL << 15)) !=
 0) && (global_options.x_ix86_move_max == PVW_AVX512 ||
 global_options.x_ix86_store_max == PVW_AVX512)) ? 64 : ((((global_options
.x_ix86_isa_flags & (1UL << 8)) != 0) && (global_options
.x_ix86_move_max >= PVW_AVX256 || global_options.x_ix86_store_max
 >= PVW_AVX256)) ? 32 : ((((global_options.x_ix86_isa_flags
 & (1UL << 51)) != 0) && ix86_tune_features
[X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL] && ix86_tune_features
[X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL]) ? 16 : (((global_options
.x_ix86_isa_flags & (1UL << 1)) != 0) ? 8 : 4)))), align);

while (max_size > 1 && l > 0)
  {
    mode = widest_fixed_size_mode_for_size (max_size,
			      op == SET_BY_PIECES);
    enum insn_code icode;

    unsigned int modesize = GET_MODE_SIZE (mode);

    icode = optab_handler (mov_optab, mode);
    if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode)get_mode_alignment (mode))
{
 unsigned HOST_WIDE_INTlong n_pieces = l / modesize;
 l %= modesize;
 switch (op)
   {
   default:
     n_insns += n_pieces;
     break;

   case COMPARE_BY_PIECES:
     int batch = targetm.compare_by_pieces_branch_ratio (mode);
     int batch_ops = 4 * batch - 1;
     unsigned HOST_WIDE_INTlong full = n_pieces / batch;
     n_insns += full * batch_ops;
     if (n_pieces % batch != 0)
n_insns++;
     break;

   }
}
    max_size = modesize;
  }

gcc_assert (!l)((void)(!(!l) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 1110, __FUNCTION__), 0 : 0));
return n_insns;
1112}

1114/* Used when performing piecewise block operations, holds information
 about one of the memory objects involved.  The member functions
 can be used to generate code for loading from the object and
 updating the address when iterating.  */

1119class pieces_addr
1120{
/* The object being referenced, a MEM.  Can be NULL_RTX to indicate
   stack pushes.  */
rtx m_obj;
/* The address of the object.  Can differ from that seen in the
   MEM rtx if we copied the address to a register.  */
rtx m_addr;
/* Nonzero if the address on the object has an autoincrement already,
   signifies whether that was an increment or decrement.  */
signed char m_addr_inc;
/* Nonzero if we intend to use autoinc without the address already
   having autoinc form.  We will insert add insns around each memory
   reference, expecting later passes to form autoinc addressing modes.
   The only supported options are predecrement and postincrement.  */
signed char m_explicit_inc;
/* True if we have either of the two possible cases of using
   autoincrement.  */
bool m_auto;
/* True if this is an address to be used for load operations rather
   than stores.  */
bool m_is_load;

/* Optionally, a function to obtain constants for any given offset into
   the objects, and data associated with it.  */
by_pieces_constfn m_constfn;
void *m_cfndata;
1146public:
pieces_addr (rtx, bool, by_pieces_constfn, void *);
rtx adjust (fixed_size_mode, HOST_WIDE_INTlong, by_pieces_prev * = nullptr);
void increment_address (HOST_WIDE_INTlong);
void maybe_predec (HOST_WIDE_INTlong);
void maybe_postinc (HOST_WIDE_INTlong);
void decide_autoinc (machine_mode, bool, HOST_WIDE_INTlong);
int get_addr_inc ()
{
  return m_addr_inc;
}
1157};

1159/* Initialize a pieces_addr structure from an object OBJ.  IS_LOAD is
 true if the operation to be performed on this object is a load
 rather than a store.  For stores, OBJ can be NULL, in which case we
 assume the operation is a stack push.  For loads, the optional
 CONSTFN and its associated CFNDATA can be used in place of the
 memory load.  */

1166pieces_addr::pieces_addr (rtx obj, bool is_load, by_pieces_constfn constfn,
	  void *cfndata)
: m_obj (obj), m_is_load (is_load), m_constfn (constfn), m_cfndata (cfndata)
1169{
m_addr_inc = 0;
m_auto = false;
if (obj)
  {
    rtx addr = XEXP (obj, 0)(((obj)->u.fld[0]).rt_rtx);
    rtx_code code = GET_CODE (addr)((enum rtx_code) (addr)->code);
    m_addr = addr;
    bool dec = code == PRE_DEC || code == POST_DEC;
    bool inc = code == PRE_INC || code == POST_INC;
    m_auto = inc || dec;
    if (m_auto)
m_addr_inc = dec ? -1 : 1;

    /* While we have always looked for these codes here, the code
implementing the memory operation has never handled them.
Support could be added later if necessary or beneficial.  */
    gcc_assert (code != PRE_INC && code != POST_DEC)((void)(!(code != PRE_INC && code != POST_DEC) ? fancy_abort
 ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 1186, __FUNCTION__), 0 : 0));
  }
else
  {
    m_addr = NULL_RTX(rtx) 0;
    if (!is_load)
{
 m_auto = true;
 if (STACK_GROWS_DOWNWARD1)
   m_addr_inc = -1;
 else
   m_addr_inc = 1;
}
    else
gcc_assert (constfn != NULL)((void)(!(constfn != nullptr) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 1200, __FUNCTION__), 0 : 0));
  }
m_explicit_inc = 0;
if (constfn)
  gcc_assert (is_load)((void)(!(is_load) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 1204, __FUNCTION__), 0 : 0));
1205}

1207/* Decide whether to use autoinc for an address involved in a memory op.
 MODE is the mode of the accesses, REVERSE is true if we've decided to
 perform the operation starting from the end, and LEN is the length of
 the operation.  Don't override an earlier decision to set m_auto.  */

1212void
1213pieces_addr::decide_autoinc (machine_mode ARG_UNUSED (mode)mode __attribute__ ((__unused__)), bool reverse,
	     HOST_WIDE_INTlong len)
1215{
if (m_auto || m_obj == NULL_RTX(rtx) 0)
  return;

bool use_predec = (m_is_load
     ? USE_LOAD_PRE_DECREMENT (mode)0
     : USE_STORE_PRE_DECREMENT (mode)0);
bool use_postinc = (m_is_load
      ? USE_LOAD_POST_INCREMENT (mode)0
      : USE_STORE_POST_INCREMENT (mode)0);
machine_mode addr_mode = get_address_mode (m_obj);

if (use_predec && reverse)
  {
    m_addr = copy_to_mode_reg (addr_mode,
		 plus_constant (addr_mode,
				m_addr, len));
    m_auto = true;
    m_explicit_inc = -1;
  }
else if (use_postinc && !reverse)
  {
    m_addr = copy_to_mode_reg (addr_mode, m_addr);
    m_auto = true;
    m_explicit_inc = 1;
  }
else if (CONSTANT_P (m_addr)((rtx_class[(int) (((enum rtx_code) (m_addr)->code))]) == RTX_CONST_OBJ
))
  m_addr = copy_to_mode_reg (addr_mode, m_addr);
1243}

1245/* Adjust the address to refer to the data at OFFSET in MODE.  If we
 are using autoincrement for this address, we don't add the offset,
 but we still modify the MEM's properties.  */

1249rtx
1250pieces_addr::adjust (fixed_size_mode mode, HOST_WIDE_INTlong offset,
     by_pieces_prev *prev)
1252{
if (m_constfn)
  /* Pass the previous data to m_constfn.  */
  return m_constfn (m_cfndata, prev, offset, mode);
if (m_obj == NULL_RTX(rtx) 0)
  return NULL_RTX(rtx) 0;
if (m_auto)
  return adjust_automodify_address (m_obj, mode, m_addr, offset)adjust_automodify_address_1 (m_obj, mode, m_addr, offset, 1);
else
  return adjust_address (m_obj, mode, offset)adjust_address_1 (m_obj, mode, offset, 1, 1, 0, 0);
1262}

1264/* Emit an add instruction to increment the address by SIZE.  */

1266void
1267pieces_addr::increment_address (HOST_WIDE_INTlong size)
1268{
rtx amount = gen_int_mode (size, GET_MODE (m_addr)((machine_mode) (m_addr)->mode));
emit_insn (gen_add2_insn (m_addr, amount));
1271}

1273/* If we are supposed to decrement the address after each access, emit code
 to do so now.  Increment by SIZE (which has should have the correct sign
 already).  */

1277void
1278pieces_addr::maybe_predec (HOST_WIDE_INTlong size)
1279{
if (m_explicit_inc >= 0)
  return;
gcc_assert (HAVE_PRE_DECREMENT)((void)(!(0) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 1282, __FUNCTION__), 0 : 0));
increment_address (size);
1284}

1286/* If we are supposed to decrement the address after each access, emit code
 to do so now.  Increment by SIZE.  */

1289void
1290pieces_addr::maybe_postinc (HOST_WIDE_INTlong size)
1291{
if (m_explicit_inc <= 0)
  return;
gcc_assert (HAVE_POST_INCREMENT)((void)(!(0) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 1294, __FUNCTION__), 0 : 0));
increment_address (size);
1296}

1298/* This structure is used by do_op_by_pieces to describe the operation
 to be performed.  */

1301class op_by_pieces_d
1302{
private:
fixed_size_mode get_usable_mode (fixed_size_mode, unsigned int);
fixed_size_mode smallest_fixed_size_mode_for_size (unsigned int);

protected:
pieces_addr m_to, m_from;
/* Make m_len read-only so that smallest_fixed_size_mode_for_size can
   use it to check the valid mode size.  */
const unsigned HOST_WIDE_INTlong m_len;
HOST_WIDE_INTlong m_offset;
unsigned int m_align;
unsigned int m_max_size;
bool m_reverse;
/* True if this is a stack push.  */
bool m_push;
/* True if targetm.overlap_op_by_pieces_p () returns true.  */
bool m_overlap_op_by_pieces;
/* True if QI vector mode can be used.  */
bool m_qi_vector_mode;

/* Virtual functions, overriden by derived classes for the specific
   operation.  */
virtual void generate (rtx, rtx, machine_mode) = 0;
virtual bool prepare_mode (machine_mode, unsigned int) = 0;
virtual void finish_mode (machine_mode)
{
}

public:
op_by_pieces_d (unsigned int, rtx, bool, rtx, bool, by_pieces_constfn,
  void *, unsigned HOST_WIDE_INTlong, unsigned int, bool,
  bool = false);
void run ();
1336};

1338/* The constructor for an op_by_pieces_d structure.  We require two
 objects named TO and FROM, which are identified as loads or stores
 by TO_LOAD and FROM_LOAD.  If FROM is a load, the optional FROM_CFN
 and its associated FROM_CFN_DATA can be used to replace loads with
 constant values.  MAX_PIECES describes the maximum number of bytes
 at a time which can be moved efficiently.  LEN describes the length
 of the operation.  */

1346op_by_pieces_d::op_by_pieces_d (unsigned int max_pieces, rtx to,
		bool to_load, rtx from, bool from_load,
		by_pieces_constfn from_cfn,
		void *from_cfn_data,
		unsigned HOST_WIDE_INTlong len,
		unsigned int align, bool push,
		bool qi_vector_mode)
: m_to (to, to_load, NULLnullptr, NULLnullptr),
  m_from (from, from_load, from_cfn, from_cfn_data),
  m_len (len), m_max_size (max_pieces + 1),
  m_push (push), m_qi_vector_mode (qi_vector_mode)
1357{
int toi = m_to.get_addr_inc ();
int fromi = m_from.get_addr_inc ();
if (toi >= 0 && fromi >= 0)
  m_reverse = false;
else if (toi <= 0 && fromi <= 0)
  m_reverse = true;
else
  gcc_unreachable ()(fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 1365, __FUNCTION__));

m_offset = m_reverse ? len : 0;
align = MIN (to ? MEM_ALIGN (to) : align,((to ? (get_mem_attrs (to)->align) : align) < (from ? (
get_mem_attrs (from)->align) : align) ? (to ? (get_mem_attrs
 (to)->align) : align) : (from ? (get_mem_attrs (from)->
align) : align))
      from ? MEM_ALIGN (from) : align)((to ? (get_mem_attrs (to)->align) : align) < (from ? (
get_mem_attrs (from)->align) : align) ? (to ? (get_mem_attrs
 (to)->align) : align) : (from ? (get_mem_attrs (from)->
align) : align));

/* If copying requires more than two move insns,
   copy addresses to registers (to make displacements shorter)
   and use post-increment if available.  */
if (by_pieces_ninsns (len, align, m_max_size, MOVE_BY_PIECES) > 2)
  {
    /* Find the mode of the largest comparison.  */
    fixed_size_mode mode
= widest_fixed_size_mode_for_size (m_max_size,
			   m_qi_vector_mode);

    m_from.decide_autoinc (mode, m_reverse, len);
    m_to.decide_autoinc (mode, m_reverse, len);
  }

align = alignment_for_piecewise_move (MOVE_MAX_PIECES((((global_options.x_ix86_isa_flags & (1UL << 15)) !=
 0) && (global_options.x_ix86_move_max == PVW_AVX512 ||
 global_options.x_ix86_store_max == PVW_AVX512)) ? 64 : ((((global_options
.x_ix86_isa_flags & (1UL << 8)) != 0) && (global_options
.x_ix86_move_max >= PVW_AVX256 || global_options.x_ix86_store_max
 >= PVW_AVX256)) ? 32 : ((((global_options.x_ix86_isa_flags
 & (1UL << 51)) != 0) && ix86_tune_features
[X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL] && ix86_tune_features
[X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL]) ? 16 : (((global_options
.x_ix86_isa_flags & (1UL << 1)) != 0) ? 8 : 4)))), align);
m_align = align;

m_overlap_op_by_pieces = targetm.overlap_op_by_pieces_p ();
1389}

1391/* This function returns the largest usable integer mode for LEN bytes
 whose size is no bigger than size of MODE.  */

1394fixed_size_mode
1395op_by_pieces_d::get_usable_mode (fixed_size_mode mode, unsigned int len)
1396{
unsigned int size;
do
  {
    size = GET_MODE_SIZE (mode);
    if (len >= size && prepare_mode (mode, m_align))
break;
    /* widest_fixed_size_mode_for_size checks SIZE > 1.  */
    mode = widest_fixed_size_mode_for_size (size, m_qi_vector_mode);
  }
while (1);
return mode;
1408}

1410/* Return the smallest integer or QI vector mode that is not narrower
 than SIZE bytes.  */

1413fixed_size_mode
1414op_by_pieces_d::smallest_fixed_size_mode_for_size (unsigned int size)
1415{
/* Use QI vector only for > size of WORD.  */
if (m_qi_vector_mode && size > UNITS_PER_WORD(((global_options.x_ix86_isa_flags & (1UL << 1)) !=
 0) ? 8 : 4))
  {
    machine_mode mode;
    fixed_size_mode candidate;
    FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_INT)for (mode_iterator::start (&(mode), MODE_VECTOR_INT); mode_iterator
::iterate_p (&(mode)); mode_iterator::get_next (&(mode
)))
if (is_a<fixed_size_mode> (mode, &candidate)
   && GET_MODE_INNER (candidate)(mode_to_inner (candidate)) == QImode(scalar_int_mode ((scalar_int_mode::from_int) E_QImode)))
 {
   /* Don't return a mode wider than M_LEN.  */
   if (GET_MODE_SIZE (candidate) > m_len)
     break;

   if (GET_MODE_SIZE (candidate) >= size
&& (optab_handler (vec_duplicate_optab, candidate)
    != CODE_FOR_nothing))
     return candidate;
 }
  }

return smallest_int_mode_for_size (size * BITS_PER_UNIT(8));
1437}

1439/* This function contains the main loop used for expanding a block
 operation.  First move what we can in the largest integer mode,
 then go to successively smaller modes.  For every access, call
 GENFUN with the two operands and the EXTRA_DATA.  */

1444void
1445op_by_pieces_d::run ()
1446{
if (m_len == 0)
  return;

unsigned HOST_WIDE_INTlong length = m_len;

/* widest_fixed_size_mode_for_size checks M_MAX_SIZE > 1.  */
fixed_size_mode mode
  = widest_fixed_size_mode_for_size (m_max_size, m_qi_vector_mode);
mode = get_usable_mode (mode, length);

by_pieces_prev to_prev = { nullptr, mode };
by_pieces_prev from_prev = { nullptr, mode };

do
  {
    unsigned int size = GET_MODE_SIZE (mode);
    rtx to1 = NULL_RTX(rtx) 0, from1;

    while (length >= size)
{
 if (m_reverse)
   m_offset -= size;

 to1 = m_to.adjust (mode, m_offset, &to_prev);
 to_prev.data = to1;
 to_prev.mode = mode;
 from1 = m_from.adjust (mode, m_offset, &from_prev);
 from_prev.data = from1;
 from_prev.mode = mode;

 m_to.maybe_predec (-(HOST_WIDE_INTlong)size);
 m_from.maybe_predec (-(HOST_WIDE_INTlong)size);

 generate (to1, from1, mode);

 m_to.maybe_postinc (size);
 m_from.maybe_postinc (size);

 if (!m_reverse)
   m_offset += size;

 length -= size;
}

    finish_mode (mode);

    if (length == 0)
return;

    if (!m_push && m_overlap_op_by_pieces)
{
 /* NB: Generate overlapping operations if it is not a stack
    push since stack push must not overlap.  Get the smallest
    fixed size mode for M_LEN bytes.  */
 mode = smallest_fixed_size_mode_for_size (length);
 mode = get_usable_mode (mode, GET_MODE_SIZE (mode));
 int gap = GET_MODE_SIZE (mode) - length;
 if (gap > 0)
   {
     /* If size of MODE > M_LEN, generate the last operation
 in MODE for the remaining bytes with ovelapping memory
 from the previois operation.  */
     if (m_reverse)
m_offset += gap;
     else
m_offset -= gap;
     length += gap;
   }
}
    else
{
 /* widest_fixed_size_mode_for_size checks SIZE > 1.  */
 mode = widest_fixed_size_mode_for_size (size,
				  m_qi_vector_mode);
 mode = get_usable_mode (mode, length);
}
  }
while (1);
1525}

1527/* Derived class from op_by_pieces_d, providing support for block move
 operations.  */

1530#ifdef PUSH_ROUNDING
1531#define PUSHG_P(to)((to) == nullptr)  ((to) == nullptr)
1532#else
1533#define PUSHG_P(to)((to) == nullptr)  false
1534#endif

1536class move_by_pieces_d : public op_by_pieces_d
1537{
insn_gen_fn m_gen_fun;
void generate (rtx, rtx, machine_mode) final override;
bool prepare_mode (machine_mode, unsigned int) final override;

public:
move_by_pieces_d (rtx to, rtx from, unsigned HOST_WIDE_INTlong len,
    unsigned int align)
  : op_by_pieces_d (MOVE_MAX_PIECES((((global_options.x_ix86_isa_flags & (1UL << 15)) !=
 0) && (global_options.x_ix86_move_max == PVW_AVX512 ||
 global_options.x_ix86_store_max == PVW_AVX512)) ? 64 : ((((global_options
.x_ix86_isa_flags & (1UL << 8)) != 0) && (global_options
.x_ix86_move_max >= PVW_AVX256 || global_options.x_ix86_store_max
 >= PVW_AVX256)) ? 32 : ((((global_options.x_ix86_isa_flags
 & (1UL << 51)) != 0) && ix86_tune_features
[X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL] && ix86_tune_features
[X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL]) ? 16 : (((global_options
.x_ix86_isa_flags & (1UL << 1)) != 0) ? 8 : 4)))), to, false, from, true, NULLnullptr,
      NULLnullptr, len, align, PUSHG_P (to)((to) == nullptr))
{
}
rtx finish_retmode (memop_ret);
1550};

1552/* Return true if MODE can be used for a set of copies, given an
 alignment ALIGN.  Prepare whatever data is necessary for later
 calls to generate.  */

1556bool
1557move_by_pieces_d::prepare_mode (machine_mode mode, unsigned int align)
1558{
insn_code icode = optab_handler (mov_optab, mode);
m_gen_fun = GEN_FCN (icode)(insn_data[icode].genfun);
return icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode)get_mode_alignment (mode);
1562}

1564/* A callback used when iterating for a compare_by_pieces_operation.
 OP0 and OP1 are the values that have been loaded and should be
 compared in MODE.  If OP0 is NULL, this means we should generate a
 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
 gen function that should be used to generate the mode.  */

1570void
1571move_by_pieces_d::generate (rtx op0, rtx op1,
	    machine_mode mode ATTRIBUTE_UNUSED__attribute__ ((__unused__)))
1573{
1574#ifdef PUSH_ROUNDING
if (op0 == NULL_RTX(rtx) 0)
  {
    emit_single_push_insn (mode, op1, NULLnullptr);
    return;
  }
1580#endif
emit_insn (m_gen_fun (op0, op1));
1582}

1584/* Perform the final adjustment at the end of a string to obtain the
 correct return value for the block operation.
 Return value is based on RETMODE argument.  */

1588rtx
1589move_by_pieces_d::finish_retmode (memop_ret retmode)
1590{
gcc_assert (!m_reverse)((void)(!(!m_reverse) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 1591, __FUNCTION__), 0 : 0));
if (retmode == RETURN_END_MINUS_ONE)
  {
    m_to.maybe_postinc (-1);
    --m_offset;
  }
return m_to.adjust (QImode(scalar_int_mode ((scalar_int_mode::from_int) E_QImode)), m_offset);
1598}

1600/* Generate several move instructions to copy LEN bytes from block FROM to
 block TO.  (These are MEM rtx's with BLKmode).

 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
 used to push FROM to the stack.

 ALIGN is maximum stack alignment we can assume.

 Return value is based on RETMODE argument.  */

1610rtx
1611move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INTlong len,
unsigned int align, memop_ret retmode)
1613{
1614#ifndef PUSH_ROUNDING
if (to == NULLnullptr)
  gcc_unreachable ()(fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 1616, __FUNCTION__));
1617#endif

move_by_pieces_d data (to, from, len, align);

data.run ();

if (retmode != RETURN_BEGIN)
  return data.finish_retmode (retmode);
else
  return to;
1627}

1629/* Derived class from op_by_pieces_d, providing support for block move
 operations.  */

1632class store_by_pieces_d : public op_by_pieces_d
1633{
insn_gen_fn m_gen_fun;
void generate (rtx, rtx, machine_mode) final override;
bool prepare_mode (machine_mode, unsigned int) final override;

public:
store_by_pieces_d (rtx to, by_pieces_constfn cfn, void *cfn_data,
     unsigned HOST_WIDE_INTlong len, unsigned int align,
     bool qi_vector_mode)
  : op_by_pieces_d (STORE_MAX_PIECES(ix86_tune_features[X86_TUNE_INTER_UNIT_MOVES_TO_VEC] ? ((((global_options
.x_ix86_isa_flags & (1UL << 15)) != 0) && global_options
.x_ix86_store_max == PVW_AVX512) ? 64 : ((((global_options.x_ix86_isa_flags
 & (1UL << 8)) != 0) && global_options.x_ix86_store_max
 >= PVW_AVX256) ? 32 : ((((global_options.x_ix86_isa_flags
 & (1UL << 51)) != 0) && ix86_tune_features
[X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL]) ? 16 : (((global_options
.x_ix86_isa_flags & (1UL << 1)) != 0) ? 8 : 4)))) :
 (((global_options.x_ix86_isa_flags & (1UL << 1)) !=
 0) ? 8 : 4)), to, false, NULL_RTX(rtx) 0, true, cfn,
      cfn_data, len, align, false, qi_vector_mode)
{
}
rtx finish_retmode (memop_ret);
1647};

1649/* Return true if MODE can be used for a set of stores, given an
 alignment ALIGN.  Prepare whatever data is necessary for later
 calls to generate.  */

1653bool
1654store_by_pieces_d::prepare_mode (machine_mode mode, unsigned int align)
1655{
insn_code icode = optab_handler (mov_optab, mode);
m_gen_fun = GEN_FCN (icode)(insn_data[icode].genfun);
return icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode)get_mode_alignment (mode);
1659}

1661/* A callback used when iterating for a store_by_pieces_operation.
 OP0 and OP1 are the values that have been loaded and should be
 compared in MODE.  If OP0 is NULL, this means we should generate a
 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
 gen function that should be used to generate the mode.  */

1667void
1668store_by_pieces_d::generate (rtx op0, rtx op1, machine_mode)
1669{
emit_insn (m_gen_fun (op0, op1));
1671}

1673/* Perform the final adjustment at the end of a string to obtain the
 correct return value for the block operation.
 Return value is based on RETMODE argument.  */

1677rtx
1678store_by_pieces_d::finish_retmode (memop_ret retmode)
1679{
gcc_assert (!m_reverse)((void)(!(!m_reverse) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 1680, __FUNCTION__), 0 : 0));
if (retmode == RETURN_END_MINUS_ONE)
  {
    m_to.maybe_postinc (-1);
    --m_offset;
  }
return m_to.adjust (QImode(scalar_int_mode ((scalar_int_mode::from_int) E_QImode)), m_offset);
1687}

1689/* Determine whether the LEN bytes generated by CONSTFUN can be
 stored to memory using several move instructions.  CONSTFUNDATA is
 a pointer which will be passed as argument in every CONSTFUN call.
 ALIGN is maximum alignment we can assume.  MEMSETP is true if this is
 a memset operation and false if it's a copy of a constant string.
 Return nonzero if a call to store_by_pieces should succeed.  */

1696int
1697can_store_by_pieces (unsigned HOST_WIDE_INTlong len,
     by_pieces_constfn constfun,
     void *constfundata, unsigned int align, bool memsetp)
1700{
unsigned HOST_WIDE_INTlong l;
unsigned int max_size;
HOST_WIDE_INTlong offset = 0;
enum insn_code icode;
int reverse;
/* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it.  */
rtx cst ATTRIBUTE_UNUSED__attribute__ ((__unused__));

if (len == 0)
  return 1;

if (!targetm.use_by_pieces_infrastructure_p (len, align,
			       memsetp
				 ? SET_BY_PIECES
				 : STORE_BY_PIECES,
			       optimize_insn_for_speed_p ()))
  return 0;

align = alignment_for_piecewise_move (STORE_MAX_PIECES(ix86_tune_features[X86_TUNE_INTER_UNIT_MOVES_TO_VEC] ? ((((global_options
.x_ix86_isa_flags & (1UL << 15)) != 0) && global_options
.x_ix86_store_max == PVW_AVX512) ? 64 : ((((global_options.x_ix86_isa_flags
 & (1UL << 8)) != 0) && global_options.x_ix86_store_max
 >= PVW_AVX256) ? 32 : ((((global_options.x_ix86_isa_flags
 & (1UL << 51)) != 0) && ix86_tune_features
[X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL]) ? 16 : (((global_options
.x_ix86_isa_flags & (1UL << 1)) != 0) ? 8 : 4)))) :
 (((global_options.x_ix86_isa_flags & (1UL << 1)) !=
 0) ? 8 : 4)), align);

/* We would first store what we can in the largest integer mode, then go to
   successively smaller modes.  */

for (reverse = 0;
     reverse <= (HAVE_PRE_DECREMENT0 || HAVE_POST_DECREMENT0);
     reverse++)
  {
    l = len;
    max_size = STORE_MAX_PIECES(ix86_tune_features[X86_TUNE_INTER_UNIT_MOVES_TO_VEC] ? ((((global_options
.x_ix86_isa_flags & (1UL << 15)) != 0) && global_options
.x_ix86_store_max == PVW_AVX512) ? 64 : ((((global_options.x_ix86_isa_flags
 & (1UL << 8)) != 0) && global_options.x_ix86_store_max
 >= PVW_AVX256) ? 32 : ((((global_options.x_ix86_isa_flags
 & (1UL << 51)) != 0) && ix86_tune_features
[X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL]) ? 16 : (((global_options
.x_ix86_isa_flags & (1UL << 1)) != 0) ? 8 : 4)))) :
 (((global_options.x_ix86_isa_flags & (1UL << 1)) !=
 0) ? 8 : 4)) + 1;
    while (max_size > 1 && l > 0)
{
 fixed_size_mode mode
   = widest_fixed_size_mode_for_size (max_size, memsetp);

 icode = optab_handler (mov_optab, mode);
 if (icode != CODE_FOR_nothing
     && align >= GET_MODE_ALIGNMENT (mode)get_mode_alignment (mode))
   {
     unsigned int size = GET_MODE_SIZE (mode);

     while (l >= size)
{
  if (reverse)
    offset -= size;

  cst = (*constfun) (constfundata, nullptr, offset, mode);
  /* All CONST_VECTORs can be loaded for memset since
     vec_duplicate_optab is a precondition to pick a
     vector mode for the memset expander.  */
  if (!((memsetp && VECTOR_MODE_P (mode)(((enum mode_class) mode_class[mode]) == MODE_VECTOR_BOOL || (
(enum mode_class) mode_class[mode]) == MODE_VECTOR_INT || ((enum
 mode_class) mode_class[mode]) == MODE_VECTOR_FLOAT || ((enum
 mode_class) mode_class[mode]) == MODE_VECTOR_FRACT || ((enum
 mode_class) mode_class[mode]) == MODE_VECTOR_UFRACT || ((enum
 mode_class) mode_class[mode]) == MODE_VECTOR_ACCUM || ((enum
 mode_class) mode_class[mode]) == MODE_VECTOR_UACCUM))
	|| targetm.legitimate_constant_p (mode, cst)))
    return 0;

  if (!reverse)
    offset += size;

  l -= size;
}
   }

 max_size = GET_MODE_SIZE (mode);
}

    /* The code above should have handled everything.  */
    gcc_assert (!l)((void)(!(!l) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 1765, __FUNCTION__), 0 : 0));
  }

return 1;
1769}

1771/* Generate several move instructions to store LEN bytes generated by
 CONSTFUN to block TO.  (A MEM rtx with BLKmode).  CONSTFUNDATA is a
 pointer which will be passed as argument in every CONSTFUN call.
 ALIGN is maximum alignment we can assume.  MEMSETP is true if this is
 a memset operation and false if it's a copy of a constant string.
 Return value is based on RETMODE argument.  */

1778rtx
1779store_by_pieces (rtx to, unsigned HOST_WIDE_INTlong len,
 by_pieces_constfn constfun,
 void *constfundata, unsigned int align, bool memsetp,
 memop_ret retmode)
1783{
if (len == 0)
  {
    gcc_assert (retmode != RETURN_END_MINUS_ONE)((void)(!(retmode != RETURN_END_MINUS_ONE) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 1786, __FUNCTION__), 0 : 0));
    return to;
  }

gcc_assert (targetm.use_by_pieces_infrastructure_p((void)(!(targetm.use_by_pieces_infrastructure_p (len, align,
 memsetp ? SET_BY_PIECES : STORE_BY_PIECES, optimize_insn_for_speed_p
 ())) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 1793, __FUNCTION__), 0 : 0))
(len, align,((void)(!(targetm.use_by_pieces_infrastructure_p (len, align,
 memsetp ? SET_BY_PIECES : STORE_BY_PIECES, optimize_insn_for_speed_p
 ())) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 1793, __FUNCTION__), 0 : 0))
 memsetp ? SET_BY_PIECES : STORE_BY_PIECES,((void)(!(targetm.use_by_pieces_infrastructure_p (len, align,
 memsetp ? SET_BY_PIECES : STORE_BY_PIECES, optimize_insn_for_speed_p
 ())) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 1793, __FUNCTION__), 0 : 0))
 optimize_insn_for_speed_p ()))((void)(!(targetm.use_by_pieces_infrastructure_p (len, align,
 memsetp ? SET_BY_PIECES : STORE_BY_PIECES, optimize_insn_for_speed_p
 ())) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 1793, __FUNCTION__), 0 : 0));

store_by_pieces_d data (to, constfun, constfundata, len, align,
	  memsetp);
data.run ();

if (retmode != RETURN_BEGIN)
  return data.finish_retmode (retmode);
else
  return to;
1803}

1805/* Generate several move instructions to clear LEN bytes of block TO.  (A MEM
 rtx with BLKmode).  ALIGN is maximum alignment we can assume.  */

1808static void
1809clear_by_pieces (rtx to, unsigned HOST_WIDE_INTlong len, unsigned int align)
1810{
if (len == 0)
  return;

/* Use builtin_memset_read_str to support vector mode broadcast.  */
char c = 0;
store_by_pieces_d data (to, builtin_memset_read_str, &c, len, align,
	  true);
data.run ();
1819}

1821/* Context used by compare_by_pieces_genfn.  It stores the fail label
 to jump to in case of miscomparison, and for branch ratios greater than 1,
 it stores an accumulator and the current and maximum counts before
 emitting another branch.  */

1826class compare_by_pieces_d : public op_by_pieces_d
1827{
rtx_code_label *m_fail_label;
rtx m_accumulator;
int m_count, m_batch;

void generate (rtx, rtx, machine_mode) final override;
bool prepare_mode (machine_mode, unsigned int) final override;
void finish_mode (machine_mode) final override;
public:
compare_by_pieces_d (rtx op0, rtx op1, by_pieces_constfn op1_cfn,
       void *op1_cfn_data, HOST_WIDE_INTlong len, int align,
       rtx_code_label *fail_label)
  : op_by_pieces_d (COMPARE_MAX_PIECES((((global_options.x_ix86_isa_flags & (1UL << 15)) !=
 0) && (global_options.x_ix86_move_max == PVW_AVX512 ||
 global_options.x_ix86_store_max == PVW_AVX512)) ? 64 : ((((global_options
.x_ix86_isa_flags & (1UL << 8)) != 0) && (global_options
.x_ix86_move_max >= PVW_AVX256 || global_options.x_ix86_store_max
 >= PVW_AVX256)) ? 32 : ((((global_options.x_ix86_isa_flags
 & (1UL << 51)) != 0) && ix86_tune_features
[X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL] && ix86_tune_features
[X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL]) ? 16 : (((global_options
.x_ix86_isa_flags & (1UL << 1)) != 0) ? 8 : 4)))), op0, true, op1, true, op1_cfn,
      op1_cfn_data, len, align, false)
{
  m_fail_label = fail_label;
}
1844};

1846/* A callback used when iterating for a compare_by_pieces_operation.
 OP0 and OP1 are the values that have been loaded and should be
 compared in MODE.  DATA holds a pointer to the compare_by_pieces_data
 context structure.  */

1851void
1852compare_by_pieces_d::generate (rtx op0, rtx op1, machine_mode mode)
1853{
if (m_batch > 1)
  {
    rtx temp = expand_binop (mode, sub_optab, op0, op1, NULL_RTX(rtx) 0,
	       true, OPTAB_LIB_WIDEN);
    if (m_count != 0)
temp = expand_binop (mode, ior_optab, m_accumulator, temp, temp,
	     true, OPTAB_LIB_WIDEN);
    m_accumulator = temp;

    if (++m_count < m_batch)
return;

    m_count = 0;
    op0 = m_accumulator;
    op1 = const0_rtx(const_int_rtx[64]);
    m_accumulator = NULL_RTX(rtx) 0;
  }
do_compare_rtx_and_jump (op0, op1, NE, true, mode, NULL_RTX(rtx) 0, NULLnullptr,
	   m_fail_label, profile_probability::uninitialized ());
1873}

1875/* Return true if MODE can be used for a set of moves and comparisons,
 given an alignment ALIGN.  Prepare whatever data is necessary for
 later calls to generate.  */

1879bool
1880compare_by_pieces_d::prepare_mode (machine_mode mode, unsigned int align)
1881{
insn_code icode = optab_handler (mov_optab, mode);
if (icode == CODE_FOR_nothing
    || align < GET_MODE_ALIGNMENT (mode)get_mode_alignment (mode)
    || !can_compare_p (EQ, mode, ccp_jump))
  return false;
m_batch = targetm.compare_by_pieces_branch_ratio (mode);
if (m_batch < 0)
  return false;
m_accumulator = NULL_RTX(rtx) 0;
m_count = 0;
return true;
1893}

1895/* Called after expanding a series of comparisons in MODE.  If we have
 accumulated results for which we haven't emitted a branch yet, do
 so now.  */

1899void
1900compare_by_pieces_d::finish_mode (machine_mode mode)
1901{
if (m_accumulator != NULL_RTX(rtx) 0)
  do_compare_rtx_and_jump (m_accumulator, const0_rtx(const_int_rtx[64]), NE, true, mode,
	     NULL_RTX(rtx) 0, NULLnullptr, m_fail_label,
	     profile_probability::uninitialized ());
1906}

1908/* Generate several move instructions to compare LEN bytes from blocks
 ARG0 and ARG1.  (These are MEM rtx's with BLKmode).

 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
 used to push FROM to the stack.

 ALIGN is maximum stack alignment we can assume.

 Optionally, the caller can pass a constfn and associated data in A1_CFN
 and A1_CFN_DATA. describing that the second operand being compared is a
 known constant and how to obtain its data.  */

1920static rtx
1921compare_by_pieces (rtx arg0, rtx arg1, unsigned HOST_WIDE_INTlong len,
   rtx target, unsigned int align,
   by_pieces_constfn a1_cfn, void *a1_cfn_data)
1924{
rtx_code_label *fail_label = gen_label_rtx ();
rtx_code_label *end_label = gen_label_rtx ();

if (target == NULL_RTX(rtx) 0
    || !REG_P (target)(((enum rtx_code) (target)->code) == REG) || REGNO (target)(rhs_regno(target)) < FIRST_PSEUDO_REGISTER76)
  target = gen_reg_rtx (TYPE_MODE (integer_type_node)((((enum tree_code) ((tree_class_check ((integer_types[itk_int
]), (tcc_type), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 1930, __FUNCTION__)))->base.code) == VECTOR_TYPE) ? vector_type_mode
 (integer_types[itk_int]) : (integer_types[itk_int])->type_common
.mode));

compare_by_pieces_d data (arg0, arg1, a1_cfn, a1_cfn_data, len, align,
	    fail_label);

data.run ();

emit_move_insn (target, const0_rtx(const_int_rtx[64]));
emit_jump (end_label);
emit_barrier ();
emit_label (fail_label);
emit_move_insn (target, const1_rtx(const_int_rtx[64 +1]));
emit_label (end_label);

return target;
1945}
1946
1947/* Emit code to move a block Y to a block X.  This may be done with
 string-move instructions, with multiple scalar move instructions,
 or with a library call.

 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
 SIZE is an rtx that says how long they are.
 ALIGN is the maximum alignment we can assume they have.
 METHOD describes what kind of copy this is, and what mechanisms may be used.
 MIN_SIZE is the minimal size of block to move
 MAX_SIZE is the maximal size of block to move, if it cannot be represented
 in unsigned HOST_WIDE_INT, than it is mask of all ones.

 Return the address of the new block, if memcpy is called and returns it,
 0 otherwise.  */

1962rtx
1963emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
       unsigned int expected_align, HOST_WIDE_INTlong expected_size,
       unsigned HOST_WIDE_INTlong min_size,
       unsigned HOST_WIDE_INTlong max_size,
       unsigned HOST_WIDE_INTlong probable_max_size,
       bool bail_out_libcall, bool *is_move_done,
       bool might_overlap)
1970{
int may_use_call;
rtx retval = 0;
unsigned int align;

if (is_move_done)
  *is_move_done = true;

gcc_assert (size)((void)(!(size) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 1978, __FUNCTION__), 0 : 0));
if (CONST_INT_P (size)(((enum rtx_code) (size)->code) == CONST_INT) && INTVAL (size)((size)->u.hwint[0]) == 0)
  return 0;

switch (method)
  {
  case BLOCK_OP_NORMAL:
  case BLOCK_OP_TAILCALL:
    may_use_call = 1;
    break;

  case BLOCK_OP_CALL_PARM:
    may_use_call = block_move_libcall_safe_for_call_parm ();

    /* Make inhibit_defer_pop nonzero around the library call
to force it to pop the arguments right away.  */
    NO_DEFER_POP(((&x_rtl)->expr.x_inhibit_defer_pop) += 1);
    break;

  case BLOCK_OP_NO_LIBCALL:
    may_use_call = 0;
    break;

  case BLOCK_OP_NO_LIBCALL_RET:
    may_use_call = -1;
    break;

  default:
    gcc_unreachable ()(fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2006, __FUNCTION__));
  }

gcc_assert (MEM_P (x) && MEM_P (y))((void)(!((((enum rtx_code) (x)->code) == MEM) && (
((enum rtx_code) (y)->code) == MEM)) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2009, __FUNCTION__), 0 : 0));
align = MIN (MEM_ALIGN (x), MEM_ALIGN (y))(((get_mem_attrs (x)->align)) < ((get_mem_attrs (y)->
align)) ? ((get_mem_attrs (x)->align)) : ((get_mem_attrs (
y)->align)));
gcc_assert (align >= BITS_PER_UNIT)((void)(!(align >= (8)) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2011, __FUNCTION__), 0 : 0));

/* Make sure we've got BLKmode addresses; store_one_arg can decide that
   block copy is more efficient for other large modes, e.g. DCmode.  */
x = adjust_address (x, BLKmode, 0)adjust_address_1 (x, ((void) 0, E_BLKmode), 0, 1, 1, 0, 0);
y = adjust_address (y, BLKmode, 0)adjust_address_1 (y, ((void) 0, E_BLKmode), 0, 1, 1, 0, 0);

/* If source and destination are the same, no need to copy anything.  */
if (rtx_equal_p (x, y)
    && !MEM_VOLATILE_P (x)(__extension__ ({ __typeof ((x)) const _rtx = ((x)); if (((enum
 rtx_code) (_rtx)->code) != MEM && ((enum rtx_code
) (_rtx)->code) != ASM_OPERANDS && ((enum rtx_code
) (_rtx)->code) != ASM_INPUT) rtl_check_failed_flag ("MEM_VOLATILE_P"
, _rtx, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2020, __FUNCTION__); _rtx; })->volatil)
    && !MEM_VOLATILE_P (y)(__extension__ ({ __typeof ((y)) const _rtx = ((y)); if (((enum
 rtx_code) (_rtx)->code) != MEM && ((enum rtx_code
) (_rtx)->code) != ASM_OPERANDS && ((enum rtx_code
) (_rtx)->code) != ASM_INPUT) rtl_check_failed_flag ("MEM_VOLATILE_P"
, _rtx, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2021, __FUNCTION__); _rtx; })->volatil))
  return 0;

/* Set MEM_SIZE as appropriate for this block copy.  The main place this
   can be incorrect is coming from __builtin_memcpy.  */
poly_int64 const_size;
if (poly_int_rtx_p (size, &const_size))
  {
    x = shallow_copy_rtx (x);
    y = shallow_copy_rtx (y);
    set_mem_size (x, const_size);
    set_mem_size (y, const_size);
  }

bool pieces_ok = CONST_INT_P (size)(((enum rtx_code) (size)->code) == CONST_INT)
  && can_move_by_pieces (INTVAL (size)((size)->u.hwint[0]), align);
bool pattern_ok = false;

if (!pieces_ok || might_overlap)
  {
    pattern_ok
= emit_block_move_via_pattern (x, y, size, align,
		       expected_align, expected_size,
		       min_size, max_size, probable_max_size,
		       might_overlap);
    if (!pattern_ok && might_overlap)
{
 /* Do not try any of the other methods below as they are not safe
    for overlapping moves.  */
 *is_move_done = false;
 return retval;
}
  }

if (pattern_ok)
  ;
else if (pieces_ok)
  move_by_pieces (x, y, INTVAL (size)((size)->u.hwint[0]), align, RETURN_BEGIN);
else if (may_use_call && !might_overlap
  && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))(((get_mem_attrs (x)->addrspace)) == 0)
  && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y))(((get_mem_attrs (y)->addrspace)) == 0))
  {
    if (bail_out_libcall)
{
 if (is_move_done)
   *is_move_done = false;
 return retval;
}

    if (may_use_call < 0)
return pc_rtx;

    retval = emit_block_copy_via_libcall (x, y, size,
			    method == BLOCK_OP_TAILCALL);
  }
else if (might_overlap)
  *is_move_done = false;
else
  emit_block_move_via_loop (x, y, size, align);

if (method == BLOCK_OP_CALL_PARM)
  OK_DEFER_POP(((&x_rtl)->expr.x_inhibit_defer_pop) -= 1);

return retval;
2085}

2087rtx
2088emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
2089{
unsigned HOST_WIDE_INTlong max, min = 0;
if (GET_CODE (size)((enum rtx_code) (size)->code) == CONST_INT)
  min = max = UINTVAL (size)((unsigned long) ((size)->u.hwint[0]));
else
  max = GET_MODE_MASK (GET_MODE (size))mode_mask_array[((machine_mode) (size)->mode)];
return emit_block_move_hints (x, y, size, method, 0, -1,
		min, max, max);
2097}

2099/* A subroutine of emit_block_move.  Returns true if calling the
 block move libcall will not clobber any parameters which may have
 already been placed on the stack.  */

2103static bool
2104block_move_libcall_safe_for_call_parm (void)
2105{
tree fn;

/* If arguments are pushed on the stack, then they're safe.  */
if (targetm.calls.push_argument (0))
  return true;

/* If registers go on the stack anyway, any argument is sure to clobber
   an outgoing argument.  */
2114#if defined (REG_PARM_STACK_SPACE)
fn = builtin_decl_implicit (BUILT_IN_MEMCPY);
/* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
   depend on its argument.  */
(void) fn;
if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))(((global_options.x_ix86_isa_flags & (1UL << 1)) !=
 0) && ix86_function_type_abi ((!fn ? (tree) nullptr :
 ((contains_struct_check ((fn), (TS_TYPED), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2119, __FUNCTION__))->typed.type))) == MS_ABI)
    && REG_PARM_STACK_SPACE (fn)ix86_reg_parm_stack_space (fn) != 0)
  return false;
2122#endif

/* If any argument goes in memory, then it might clobber an outgoing
   argument.  */
{
  CUMULATIVE_ARGS args_so_far_v;
  cumulative_args_t args_so_far;
  tree arg;

  fn = builtin_decl_implicit (BUILT_IN_MEMCPY);
  INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3)init_cumulative_args (&(args_so_far_v), (((contains_struct_check
 ((fn), (TS_TYPED), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2132, __FUNCTION__))->typed.type)), ((rtx) 0), (0), (3) !=
 -1);
  args_so_far = pack_cumulative_args (&args_so_far_v);

  arg = TYPE_ARG_TYPES (TREE_TYPE (fn))((tree_check2 ((((contains_struct_check ((fn), (TS_TYPED), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2135, __FUNCTION__))->typed.type)), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2135, __FUNCTION__, (FUNCTION_TYPE), (METHOD_TYPE)))->type_non_common
.values);
  for ( ; arg != void_list_nodeglobal_trees[TI_VOID_LIST_NODE] ; arg = TREE_CHAIN (arg)((contains_struct_check ((arg), (TS_COMMON), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2136, __FUNCTION__))->common.chain))
    {
machine_mode mode = TYPE_MODE (TREE_VALUE (arg))((((enum tree_code) ((tree_class_check ((((tree_check ((arg),
 "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2138, __FUNCTION__, (TREE_LIST)))->list.value)), (tcc_type
), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2138, __FUNCTION__)))->base.code) == VECTOR_TYPE) ? vector_type_mode
 (((tree_check ((arg), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2138, __FUNCTION__, (TREE_LIST)))->list.value)) : (((tree_check
 ((arg), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2138, __FUNCTION__, (TREE_LIST)))->list.value))->type_common
.mode);
function_arg_info arg_info (mode, /*named=*/true);
rtx tmp = targetm.calls.function_arg (args_so_far, arg_info);
if (!tmp || !REG_P (tmp)(((enum rtx_code) (tmp)->code) == REG))
 return false;
if (targetm.calls.arg_partial_bytes (args_so_far, arg_info))
 return false;
targetm.calls.function_arg_advance (args_so_far, arg_info);
    }
}
return true;
2149}

2151/* A subroutine of emit_block_move.  Expand a cpymem or movmem pattern;
 return true if successful.

 X is the destination of the copy or move.
 Y is the source of the copy or move.
 SIZE is the size of the block to be moved.

 MIGHT_OVERLAP indicates this originated with expansion of a
 builtin_memmove() and the source and destination blocks may
 overlap.
*/

2163static bool
2164emit_block_move_via_pattern (rtx x, rtx y, rtx size, unsigned int align,
	     unsigned int expected_align,
	     HOST_WIDE_INTlong expected_size,
	     unsigned HOST_WIDE_INTlong min_size,
	     unsigned HOST_WIDE_INTlong max_size,
	     unsigned HOST_WIDE_INTlong probable_max_size,
	     bool might_overlap)
2171{
if (expected_align < align)
  expected_align = align;
if (expected_size != -1)
  {
    if ((unsigned HOST_WIDE_INTlong)expected_size > probable_max_size)
expected_size = probable_max_size;
    if ((unsigned HOST_WIDE_INTlong)expected_size < min_size)
expected_size = min_size;
  }

/* Since this is a move insn, we don't care about volatility.  */
temporary_volatile_ok v (true);

/* Try the most limited insn first, because there's no point
   including more than one in the machine description unless
   the more limited one has some advantage.  */

opt_scalar_int_mode mode_iter;
FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)for (mode_iterator::start (&(mode_iter), MODE_INT); mode_iterator
::iterate_p (&(mode_iter)); mode_iterator::get_next (&
(mode_iter)))
  {
    scalar_int_mode mode = mode_iter.require ();
    enum insn_code code;
    if (might_overlap)
code = direct_optab_handler (movmem_optab, mode);
    else
code = direct_optab_handler (cpymem_optab, mode);

    if (code != CODE_FOR_nothing
 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
    here because if SIZE is less than the mode mask, as it is
    returned by the macro, it will definitely be less than the
    actual mode mask.  Since SIZE is within the Pmode address
    space, we limit MODE to Pmode.  */
 && ((CONST_INT_P (size)(((enum rtx_code) (size)->code) == CONST_INT)
      && ((unsigned HOST_WIDE_INTlong) INTVAL (size)((size)->u.hwint[0])
   <= (GET_MODE_MASK (mode)mode_mask_array[mode] >> 1)))
     || max_size <= (GET_MODE_MASK (mode)mode_mask_array[mode] >> 1)
     || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode(global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode (
(scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode))))))
{
 class expand_operand ops[9];
 unsigned int nops;

 /* ??? When called via emit_block_move_for_call, it'd be
    nice if there were some way to inform the backend, so
    that it doesn't fail the expansion because it thinks
    emitting the libcall would be more efficient.  */
 nops = insn_data[(int) code].n_generator_args;
 gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9)((void)(!(nops == 4 || nops == 6 || nops == 8 || nops == 9) ?
 fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2219, __FUNCTION__), 0 : 0));

 create_fixed_operand (&ops[0], x);
 create_fixed_operand (&ops[1], y);
 /* The check above guarantees that this size conversion is valid.  */
 create_convert_operand_to (&ops[2], size, mode, true);
 create_integer_operand (&ops[3], align / BITS_PER_UNIT(8));
 if (nops >= 6)
   {
     create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT(8));
     create_integer_operand (&ops[5], expected_size);
   }
 if (nops >= 8)
   {
     create_integer_operand (&ops[6], min_size);
     /* If we cannot represent the maximal size,
 make parameter NULL.  */
     if ((HOST_WIDE_INTlong) max_size != -1)
       create_integer_operand (&ops[7], max_size);
     else
create_fixed_operand (&ops[7], NULLnullptr);
   }
 if (nops == 9)
   {
     /* If we cannot represent the maximal size,
 make parameter NULL.  */
     if ((HOST_WIDE_INTlong) probable_max_size != -1)
       create_integer_operand (&ops[8], probable_max_size);
     else
create_fixed_operand (&ops[8], NULLnullptr);
   }
 if (maybe_expand_insn (code, nops, ops))
   return true;
}
  }

return false;
2256}

2258/* A subroutine of emit_block_move.  Copy the data via an explicit
 loop.  This is used only when libcalls are forbidden.  */
2260/* ??? It'd be nice to copy in hunks larger than QImode.  */

2262static void
2263emit_block_move_via_loop (rtx x, rtx y, rtx size,
	  unsigned int align ATTRIBUTE_UNUSED__attribute__ ((__unused__)))
2265{
rtx_code_label *cmp_label, *top_label;
rtx iter, x_addr, y_addr, tmp;
machine_mode x_addr_mode = get_address_mode (x);
machine_mode y_addr_mode = get_address_mode (y);
machine_mode iter_mode;

iter_mode = GET_MODE (size)((machine_mode) (size)->mode);
if (iter_mode == VOIDmode((void) 0, E_VOIDmode))
  iter_mode = word_mode;

top_label = gen_label_rtx ();
cmp_label = gen_label_rtx ();
iter = gen_reg_rtx (iter_mode);

emit_move_insn (iter, const0_rtx(const_int_rtx[64]));

x_addr = force_operand (XEXP (x, 0)(((x)->u.fld[0]).rt_rtx), NULL_RTX(rtx) 0);
y_addr = force_operand (XEXP (y, 0)(((y)->u.fld[0]).rt_rtx), NULL_RTX(rtx) 0);
do_pending_stack_adjust ();

emit_jump (cmp_label);
emit_label (top_label);

tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
x_addr = simplify_gen_binary (PLUS, x_addr_mode, x_addr, tmp);

if (x_addr_mode != y_addr_mode)
  tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
y_addr = simplify_gen_binary (PLUS, y_addr_mode, y_addr, tmp);

x = change_address (x, QImode(scalar_int_mode ((scalar_int_mode::from_int) E_QImode)), x_addr);
y = change_address (y, QImode(scalar_int_mode ((scalar_int_mode::from_int) E_QImode)), y_addr);

emit_move_insn (x, y);

tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx(const_int_rtx[64 +1]), iter,
	     true, OPTAB_LIB_WIDEN);
if (tmp != iter)
  emit_move_insn (iter, tmp);

emit_label (cmp_label);

emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX(rtx) 0, iter_mode,
	   true, top_label,
	   profile_probability::guessed_always ()
		.apply_scale (9, 10));
2312}
2313
2314/* Expand a call to memcpy or memmove or memcmp, and return the result.
 TAILCALL is true if this is a tail call.  */

2317rtx
2318emit_block_op_via_libcall (enum built_in_function fncode, rtx dst, rtx src,
	   rtx size, bool tailcall)
2320{
rtx dst_addr, src_addr;
tree call_expr, dst_tree, src_tree, size_tree;
machine_mode size_mode;

/* Since dst and src are passed to a libcall, mark the corresponding
   tree EXPR as addressable.  */
tree dst_expr = MEM_EXPR (dst)(get_mem_attrs (dst)->expr);
tree src_expr = MEM_EXPR (src)(get_mem_attrs (src)->expr);
if (dst_expr)
  mark_addressable (dst_expr);
if (src_expr)
  mark_addressable (src_expr);

dst_addr = copy_addr_to_reg (XEXP (dst, 0)(((dst)->u.fld[0]).rt_rtx));
dst_addr = convert_memory_address (ptr_mode, dst_addr)convert_memory_address_addr_space ((ptr_mode), (dst_addr), 0);
dst_tree = make_tree (ptr_type_nodeglobal_trees[TI_PTR_TYPE], dst_addr);

src_addr = copy_addr_to_reg (XEXP (src, 0)(((src)->u.fld[0]).rt_rtx));
src_addr = convert_memory_address (ptr_mode, src_addr)convert_memory_address_addr_space ((ptr_mode), (src_addr), 0);
src_tree = make_tree (ptr_type_nodeglobal_trees[TI_PTR_TYPE], src_addr);

size_mode = TYPE_MODE (sizetype)((((enum tree_code) ((tree_class_check ((sizetype_tab[(int) stk_sizetype
]), (tcc_type), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2342, __FUNCTION__)))->base.code) == VECTOR_TYPE) ? vector_type_mode
 (sizetype_tab[(int) stk_sizetype]) : (sizetype_tab[(int) stk_sizetype
])->type_common.mode);
size = convert_to_mode (size_mode, size, 1);
size = copy_to_mode_reg (size_mode, size);
size_tree = make_tree (sizetypesizetype_tab[(int) stk_sizetype], size);

/* It is incorrect to use the libcall calling conventions for calls to
   memcpy/memmove/memcmp because they can be provided by the user.  */
tree fn = builtin_decl_implicit (fncode);
call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
CALL_EXPR_TAILCALL (call_expr)((tree_check ((call_expr), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2351, __FUNCTION__, (CALL_EXPR)))->base.addressable_flag
) = tailcall;

return expand_call (call_expr, NULL_RTX(rtx) 0, false);
2354}

2356/* Try to expand cmpstrn or cmpmem operation ICODE with the given operands.
 ARG3_TYPE is the type of ARG3_RTX.  Return the result rtx on success,
 otherwise return null.  */

2360rtx
2361expand_cmpstrn_or_cmpmem (insn_code icode, rtx target, rtx arg1_rtx,
	  rtx arg2_rtx, tree arg3_type, rtx arg3_rtx,
	  HOST_WIDE_INTlong align)
2364{
machine_mode insn_mode = insn_data[icode].operand[0].mode;

if (target && (!REG_P (target)(((enum rtx_code) (target)->code) == REG) || HARD_REGISTER_P (target)((((rhs_regno(target))) < 76))))
  target = NULL_RTX(rtx) 0;

class expand_operand ops[5];
create_output_operand (&ops[0], target, insn_mode);
create_fixed_operand (&ops[1], arg1_rtx);
create_fixed_operand (&ops[2], arg2_rtx);
create_convert_operand_from (&ops[3], arg3_rtx, TYPE_MODE (arg3_type)((((enum tree_code) ((tree_class_check ((arg3_type), (tcc_type
), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2374, __FUNCTION__)))->base.code) == VECTOR_TYPE) ? vector_type_mode
 (arg3_type) : (arg3_type)->type_common.mode),
	       TYPE_UNSIGNED (arg3_type)((tree_class_check ((arg3_type), (tcc_type), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2375, __FUNCTION__))->base.u.bits.unsigned_flag));
create_integer_operand (&ops[4], align);
if (maybe_expand_insn (icode, 5, ops))
  return ops[0].value;
return NULL_RTX(rtx) 0;
2380}

2382/* Expand a block compare between X and Y with length LEN using the
 cmpmem optab, placing the result in TARGET.  LEN_TYPE is the type
 of the expression that was used to calculate the length.  ALIGN
 gives the known minimum common alignment.  */

2387static rtx
2388emit_block_cmp_via_cmpmem (rtx x, rtx y, rtx len, tree len_type, rtx target,
	   unsigned align)
2390{
/* Note: The cmpstrnsi pattern, if it exists, is not suitable for
   implementing memcmp because it will stop if it encounters two
   zero bytes.  */
insn_code icode = direct_optab_handler (cmpmem_optab, SImode(scalar_int_mode ((scalar_int_mode::from_int) E_SImode)));

if (icode == CODE_FOR_nothing)
  return NULL_RTX(rtx) 0;

return expand_cmpstrn_or_cmpmem (icode, target, x, y, len_type, len, align);
2400}

2402/* Emit code to compare a block Y to a block X.  This may be done with
 string-compare instructions, with multiple scalar instructions,
 or with a library call.

 Both X and Y must be MEM rtx's.  LEN is an rtx that says how long
 they are.  LEN_TYPE is the type of the expression that was used to
 calculate it.

 If EQUALITY_ONLY is true, it means we don't have to return the tri-state
 value of a normal memcmp call, instead we can just compare for equality.
 If FORCE_LIBCALL is true, we should emit a call to memcmp rather than
 returning NULL_RTX.

 Optionally, the caller can pass a constfn and associated data in Y_CFN
 and Y_CFN_DATA. describing that the second operand being compared is a
 known constant and how to obtain its data.
 Return the result of the comparison, or NULL_RTX if we failed to
 perform the operation.  */

2421rtx
2422emit_block_cmp_hints (rtx x, rtx y, rtx len, tree len_type, rtx target,
      bool equality_only, by_pieces_constfn y_cfn,
      void *y_cfndata)
2425{
rtx result = 0;

if (CONST_INT_P (len)(((enum rtx_code) (len)->code) == CONST_INT) && INTVAL (len)((len)->u.hwint[0]) == 0)
  return const0_rtx(const_int_rtx[64]);

gcc_assert (MEM_P (x) && MEM_P (y))((void)(!((((enum rtx_code) (x)->code) == MEM) && (
((enum rtx_code) (y)->code) == MEM)) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2431, __FUNCTION__), 0 : 0));
unsigned int align = MIN (MEM_ALIGN (x), MEM_ALIGN (y))(((get_mem_attrs (x)->align)) < ((get_mem_attrs (y)->
align)) ? ((get_mem_attrs (x)->align)) : ((get_mem_attrs (
y)->align)));
gcc_assert (align >= BITS_PER_UNIT)((void)(!(align >= (8)) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2433, __FUNCTION__), 0 : 0));

x = adjust_address (x, BLKmode, 0)adjust_address_1 (x, ((void) 0, E_BLKmode), 0, 1, 1, 0, 0);
y = adjust_address (y, BLKmode, 0)adjust_address_1 (y, ((void) 0, E_BLKmode), 0, 1, 1, 0, 0);

if (equality_only
    && CONST_INT_P (len)(((enum rtx_code) (len)->code) == CONST_INT)
    && can_do_by_pieces (INTVAL (len)((len)->u.hwint[0]), align, COMPARE_BY_PIECES))
  result = compare_by_pieces (x, y, INTVAL (len)((len)->u.hwint[0]), target, align,
		y_cfn, y_cfndata);
else
  result = emit_block_cmp_via_cmpmem (x, y, len, len_type, target, align);

return result;
2447}
2448
2449/* Copy all or part of a value X into registers starting at REGNO.
 The number of registers to be filled is NREGS.  */

2452void
2453move_block_to_reg (int regno, rtx x, int nregs, machine_mode mode)
2454{
if (nregs == 0)
  return;

if (CONSTANT_P (x)((rtx_class[(int) (((enum rtx_code) (x)->code))]) == RTX_CONST_OBJ
) && !targetm.legitimate_constant_p (mode, x))
  x = validize_mem (force_const_mem (mode, x));

/* See if the machine can do this with a load multiple insn.  */
if (targetm.have_load_multiple ())
  {
    rtx_insn *last = get_last_insn ();
    rtx first = gen_rtx_REG (word_mode, regno);
    if (rtx_insn *pat = targetm.gen_load_multiple (first, x,
				     GEN_INT (nregs)gen_rtx_CONST_INT (((void) 0, E_VOIDmode), (nregs))))
{
 emit_insn (pat);
 return;
}
    else
delete_insns_since (last);
  }

for (int i = 0; i < nregs; i++)
  emit_move_insn (gen_rtx_REG (word_mode, regno + i),
    operand_subword_force (x, i, mode));
2479}

2481/* Copy all or part of a BLKmode value X out of registers starting at REGNO.
 The number of registers to be filled is NREGS.  */

2484void
2485move_block_from_reg (int regno, rtx x, int nregs)
2486{
if (nregs == 0)
  return;

/* See if the machine can do this with a store multiple insn.  */
if (targetm.have_store_multiple ())
  {
    rtx_insn *last = get_last_insn ();
    rtx first = gen_rtx_REG (word_mode, regno);
    if (rtx_insn *pat = targetm.gen_store_multiple (x, first,
				      GEN_INT (nregs)gen_rtx_CONST_INT (((void) 0, E_VOIDmode), (nregs))))
{
 emit_insn (pat);
 return;
}
    else
delete_insns_since (last);
  }

for (int i = 0; i < nregs; i++)
  {
    rtx tem = operand_subword (x, i, 1, BLKmode((void) 0, E_BLKmode));

    gcc_assert (tem)((void)(!(tem) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2509, __FUNCTION__), 0 : 0));

    emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
  }
2513}

2515/* Generate a PARALLEL rtx for a new non-consecutive group of registers from
 ORIG, where ORIG is a non-consecutive group of registers represented by
 a PARALLEL.  The clone is identical to the original except in that the
 original set of registers is replaced by a new set of pseudo registers.
 The new set has the same modes as the original set.  */

2521rtx
2522gen_group_rtx (rtx orig)
2523{
int i, length;
rtx *tmps;

gcc_assert (GET_CODE (orig) == PARALLEL)((void)(!(((enum rtx_code) (orig)->code) == PARALLEL) ? fancy_abort
 ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2527, __FUNCTION__), 0 : 0));

length = XVECLEN (orig, 0)(((((orig)->u.fld[0]).rt_rtvec))->num_elem);
tmps = XALLOCAVEC (rtx, length)((rtx *) __builtin_alloca(sizeof (rtx) * (length)));

/* Skip a NULL entry in first slot.  */
i = XEXP (XVECEXP (orig, 0, 0), 0)((((((((orig)->u.fld[0]).rt_rtvec))->elem[0]))->u.fld
[0]).rt_rtx) ? 0 : 1;

if (i)
  tmps[0] = 0;

for (; i < length; i++)
  {
    machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0))((machine_mode) (((((((((orig)->u.fld[0]).rt_rtvec))->elem
[i]))->u.fld[0]).rt_rtx))->mode);
    rtx offset = XEXP (XVECEXP (orig, 0, i), 1)((((((((orig)->u.fld[0]).rt_rtvec))->elem[i]))->u.fld
[1]).rt_rtx);

    tmps[i] = gen_rtx_EXPR_LIST (VOIDmode((void) 0, E_VOIDmode), gen_reg_rtx (mode), offset);
  }

return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps))gen_rtx_fmt_E_stat ((PARALLEL), ((((machine_mode) (orig)->
mode))), ((gen_rtvec_v (length, tmps))) );
2547}

2549/* A subroutine of emit_group_load.  Arguments as for emit_group_load,
 except that values are placed in TMPS[i], and must later be moved
 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element.  */

2553static void
2554emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type,
   poly_int64 ssize)
2556{
rtx src;
int start, i;
machine_mode m = GET_MODE (orig_src)((machine_mode) (orig_src)->mode);

gcc_assert (GET_CODE (dst) == PARALLEL)((void)(!(((enum rtx_code) (dst)->code) == PARALLEL) ? fancy_abort
 ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2561, __FUNCTION__), 0 : 0));

if (m != VOIDmode((void) 0, E_VOIDmode)
    && !SCALAR_INT_MODE_P (m)(((enum mode_class) mode_class[m]) == MODE_INT || ((enum mode_class
) mode_class[m]) == MODE_PARTIAL_INT)
    && !MEM_P (orig_src)(((enum rtx_code) (orig_src)->code) == MEM)
    && GET_CODE (orig_src)((enum rtx_code) (orig_src)->code) != CONCAT)
  {
    scalar_int_mode imode;
    if (int_mode_for_mode (GET_MODE (orig_src)((machine_mode) (orig_src)->mode)).exists (&imode))
{
 src = gen_reg_rtx (imode);
 emit_move_insn (gen_lowpartrtl_hooks.gen_lowpart (GET_MODE (orig_src)((machine_mode) (orig_src)->mode), src), orig_src);
}
    else
{
 src = assign_stack_temp (GET_MODE (orig_src)((machine_mode) (orig_src)->mode), ssize);
 emit_move_insn (src, orig_src);
}
    emit_group_load_1 (tmps, dst, src, type, ssize);
    return;
  }

/* Check for a NULL entry, used to indicate that the parameter goes
   both on the stack and in registers.  */
if (XEXP (XVECEXP (dst, 0, 0), 0)((((((((dst)->u.fld[0]).rt_rtvec))->elem[0]))->u.fld
[0]).rt_rtx))
  start = 0;
else
  start = 1;

/* Process the pieces.  */
for (i = start; i < XVECLEN (dst, 0)(((((dst)->u.fld[0]).rt_rtvec))->num_elem); i++)
  {
    machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0))((machine_mode) (((((((((dst)->u.fld[0]).rt_rtvec))->elem
[i]))->u.fld[0]).rt_rtx))->mode);
    poly_int64 bytepos = rtx_to_poly_int64 (XEXP (XVECEXP (dst, 0, i), 1)((((((((dst)->u.fld[0]).rt_rtvec))->elem[i]))->u.fld
[1]).rt_rtx));
    poly_int64 bytelen = GET_MODE_SIZE (mode);
    poly_int64 shift = 0;

    /* Handle trailing fragments that run over the size of the struct.
It's the target's responsibility to make sure that the fragment
cannot be strictly smaller in some cases and strictly larger
in others.  */
    gcc_checking_assert (ordered_p (bytepos + bytelen, ssize))((void)(!(ordered_p (bytepos + bytelen, ssize)) ? fancy_abort
 ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2602, __FUNCTION__), 0 : 0));
    if (known_size_p (ssize) && maybe_gt (bytepos + bytelen, ssize)maybe_lt (ssize, bytepos + bytelen))
{
 /* Arrange to shift the fragment to where it belongs.
    extract_bit_field loads to the lsb of the reg.  */
 if (
2608#ifdef BLOCK_REG_PADDING
     BLOCK_REG_PADDING (GET_MODE (orig_src)((machine_mode) (orig_src)->mode), type, i == start)
     == (BYTES_BIG_ENDIAN0 ? PAD_UPWARD : PAD_DOWNWARD)
2611#else
     BYTES_BIG_ENDIAN0
2613#endif
     )
   shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT(8);
 bytelen = ssize - bytepos;
 gcc_assert (maybe_gt (bytelen, 0))((void)(!(maybe_lt (0, bytelen)) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2617, __FUNCTION__), 0 : 0));
}

    /* If we won't be loading directly from memory, protect the real source
from strange tricks we might play; but make sure that the source can
be loaded directly into the destination.  */
    src = orig_src;
    if (!MEM_P (orig_src)(((enum rtx_code) (orig_src)->code) == MEM)
 && (!CONSTANT_P (orig_src)((rtx_class[(int) (((enum rtx_code) (orig_src)->code))]) ==
 RTX_CONST_OBJ)
     || (GET_MODE (orig_src)((machine_mode) (orig_src)->mode) != mode
  && GET_MODE (orig_src)((machine_mode) (orig_src)->mode) != VOIDmode((void) 0, E_VOIDmode))))
{
 if (GET_MODE (orig_src)((machine_mode) (orig_src)->mode) == VOIDmode((void) 0, E_VOIDmode))
   src = gen_reg_rtx (mode);
 else
   src = gen_reg_rtx (GET_MODE (orig_src)((machine_mode) (orig_src)->mode));

 emit_move_insn (src, orig_src);
}

    /* Optimize the access just a bit.  */
    if (MEM_P (src)(((enum rtx_code) (src)->code) == MEM)
 && (! targetm.slow_unaligned_access (mode, MEM_ALIGN (src)(get_mem_attrs (src)->align))
     || MEM_ALIGN (src)(get_mem_attrs (src)->align) >= GET_MODE_ALIGNMENT (mode)get_mode_alignment (mode))
 && multiple_p (bytepos * BITS_PER_UNIT(8), GET_MODE_ALIGNMENT (mode)get_mode_alignment (mode))
 && known_eq (bytelen, GET_MODE_SIZE (mode))(!maybe_ne (bytelen, GET_MODE_SIZE (mode))))
{
 tmps[i] = gen_reg_rtx (mode);
 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos)adjust_address_1 (src, mode, bytepos, 1, 1, 0, 0));
}
    else if (COMPLEX_MODE_P (mode)(((enum mode_class) mode_class[mode]) == MODE_COMPLEX_INT || (
(enum mode_class) mode_class[mode]) == MODE_COMPLEX_FLOAT)
      && GET_MODE (src)((machine_mode) (src)->mode) == mode
      && known_eq (bytelen, GET_MODE_SIZE (mode))(!maybe_ne (bytelen, GET_MODE_SIZE (mode))))
/* Let emit_move_complex do the bulk of the work.  */
tmps[i] = src;
    else if (GET_CODE (src)((enum rtx_code) (src)->code) == CONCAT)
{
 poly_int64 slen = GET_MODE_SIZE (GET_MODE (src)((machine_mode) (src)->mode));
 poly_int64 slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0))((machine_mode) ((((src)->u.fld[0]).rt_rtx))->mode));
 unsigned int elt;
 poly_int64 subpos;

 if (can_div_trunc_p (bytepos, slen0, &elt, &subpos)
     && known_le (subpos + bytelen, slen0)(!maybe_lt (slen0, subpos + bytelen)))
   {
     /* The following assumes that the concatenated objects all
 have the same size.  In this case, a simple calculation
 can be used to determine the object and the bit field
 to be extracted.  */
     tmps[i] = XEXP (src, elt)(((src)->u.fld[elt]).rt_rtx);
     if (maybe_ne (subpos, 0)
  || maybe_ne (subpos + bytelen, slen0)
  || (!CONSTANT_P (tmps[i])((rtx_class[(int) (((enum rtx_code) (tmps[i])->code))]) ==
 RTX_CONST_OBJ)
      && (!REG_P (tmps[i])(((enum rtx_code) (tmps[i])->code) == REG) || GET_MODE (tmps[i])((machine_mode) (tmps[i])->mode) != mode)))
tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT(8),
			     subpos * BITS_PER_UNIT(8),
			     1, NULL_RTX(rtx) 0, mode, mode, false,
			     NULLnullptr);
   }
 else
   {
     rtx mem;

     gcc_assert (known_eq (bytepos, 0))((void)(!((!maybe_ne (bytepos, 0))) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2680, __FUNCTION__), 0 : 0));
     mem = assign_stack_temp (GET_MODE (src)((machine_mode) (src)->mode), slen);
     emit_move_insn (mem, src);
     tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT(8),
			   0, 1, NULL_RTX(rtx) 0, mode, mode, false,
			   NULLnullptr);
   }
}
    else if (CONSTANT_P (src)((rtx_class[(int) (((enum rtx_code) (src)->code))]) == RTX_CONST_OBJ
) && GET_MODE (dst)((machine_mode) (dst)->mode) != BLKmode((void) 0, E_BLKmode)
             && XVECLEN (dst, 0)(((((dst)->u.fld[0]).rt_rtvec))->num_elem) > 1)
      tmps[i] = simplify_gen_subreg (mode, src, GET_MODE (dst)((machine_mode) (dst)->mode), bytepos);
    else if (CONSTANT_P (src)((rtx_class[(int) (((enum rtx_code) (src)->code))]) == RTX_CONST_OBJ
))
{
 if (known_eq (bytelen, ssize)(!maybe_ne (bytelen, ssize)))
   tmps[i] = src;
 else
   {
     rtx first, second;

     /* TODO: const_wide_int can have sizes other than this...  */
     gcc_assert (known_eq (2 * bytelen, ssize))((void)(!((!maybe_ne (2 * bytelen, ssize))) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2700, __FUNCTION__), 0 : 0));
     split_double (src, &first, &second);
     if (i)
tmps[i] = second;
     else
tmps[i] = first;
   }
}
    else if (REG_P (src)(((enum rtx_code) (src)->code) == REG) && GET_MODE (src)((machine_mode) (src)->mode) == mode)
tmps[i] = src;
    else
tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT(8),
		     bytepos * BITS_PER_UNIT(8), 1, NULL_RTX(rtx) 0,
		     mode, mode, false, NULLnullptr);

    if (maybe_ne (shift, 0))
tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
		shift, tmps[i], 0);
  }
2719}

2721/* Emit code to move a block SRC of type TYPE to a block DST,
 where DST is non-consecutive registers represented by a PARALLEL.
 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
 if not known.  */

2726void
2727emit_group_load (rtx dst, rtx src, tree type, poly_int64 ssize)
2728{
rtx *tmps;
int i;

tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0))((rtx *) __builtin_alloca(sizeof (rtx) * ((((((dst)->u.fld
[0]).rt_rtvec))->num_elem))));
emit_group_load_1 (tmps, dst, src, type, ssize);

/* Copy the extracted pieces into the proper (probable) hard regs.  */
for (i = 0; i < XVECLEN (dst, 0)(((((dst)->u.fld[0]).rt_rtvec))->num_elem); i++)
  {
    rtx d = XEXP (XVECEXP (dst, 0, i), 0)((((((((dst)->u.fld[0]).rt_rtvec))->elem[i]))->u.fld
[0]).rt_rtx);
    if (d == NULLnullptr)
continue;
    emit_move_insn (d, tmps[i]);
  }
2743}

2745/* Similar, but load SRC into new pseudos in a format that looks like
 PARALLEL.  This can later be fed to emit_group_move to get things
 in the right place.  */

2749rtx
2750emit_group_load_into_temps (rtx parallel, rtx src, tree type, poly_int64 ssize)
2751{
rtvec vec;
int i;

vec = rtvec_alloc (XVECLEN (parallel, 0)(((((parallel)->u.fld[0]).rt_rtvec))->num_elem));
emit_group_load_1 (&RTVEC_ELT (vec, 0)((vec)->elem[0]), parallel, src, type, ssize);

/* Convert the vector to look just like the original PARALLEL, except
   with the computed values.  */
for (i = 0; i < XVECLEN (parallel, 0)(((((parallel)->u.fld[0]).rt_rtvec))->num_elem); i++)
  {
    rtx e = XVECEXP (parallel, 0, i)(((((parallel)->u.fld[0]).rt_rtvec))->elem[i]);
    rtx d = XEXP (e, 0)(((e)->u.fld[0]).rt_rtx);

    if (d)
{
 d = force_reg (GET_MODE (d)((machine_mode) (d)->mode), RTVEC_ELT (vec, i)((vec)->elem[i]));
 e = alloc_EXPR_LIST (REG_NOTE_KIND (e)((enum reg_note) ((machine_mode) (e)->mode)), d, XEXP (e, 1)(((e)->u.fld[1]).rt_rtx));
}
    RTVEC_ELT (vec, i)((vec)->elem[i]) = e;
  }

return gen_rtx_PARALLEL (GET_MODE (parallel), vec)gen_rtx_fmt_E_stat ((PARALLEL), ((((machine_mode) (parallel)->
mode))), ((vec)) );
2774}

2776/* Emit code to move a block SRC to block DST, where SRC and DST are
 non-consecutive groups of registers, each represented by a PARALLEL.  */

2779void
2780emit_group_move (rtx dst, rtx src)
2781{
int i;

gcc_assert (GET_CODE (src) == PARALLEL((void)(!(((enum rtx_code) (src)->code) == PARALLEL &&
 ((enum rtx_code) (dst)->code) == PARALLEL && ((((
(src)->u.fld[0]).rt_rtvec))->num_elem) == (((((dst)->
u.fld[0]).rt_rtvec))->num_elem)) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2786, __FUNCTION__), 0 : 0))
     && GET_CODE (dst) == PARALLEL((void)(!(((enum rtx_code) (src)->code) == PARALLEL &&
 ((enum rtx_code) (dst)->code) == PARALLEL && ((((
(src)->u.fld[0]).rt_rtvec))->num_elem) == (((((dst)->
u.fld[0]).rt_rtvec))->num_elem)) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2786, __FUNCTION__), 0 : 0))
     && XVECLEN (src, 0) == XVECLEN (dst, 0))((void)(!(((enum rtx_code) (src)->code) == PARALLEL &&
 ((enum rtx_code) (dst)->code) == PARALLEL && ((((
(src)->u.fld[0]).rt_rtvec))->num_elem) == (((((dst)->
u.fld[0]).rt_rtvec))->num_elem)) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2786, __FUNCTION__), 0 : 0));

/* Skip first entry if NULL.  */
for (i = XEXP (XVECEXP (src, 0, 0), 0)((((((((src)->u.fld[0]).rt_rtvec))->elem[0]))->u.fld
[0]).rt_rtx) ? 0 : 1; i < XVECLEN (src, 0)(((((src)->u.fld[0]).rt_rtvec))->num_elem); i++)
  emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0)((((((((dst)->u.fld[0]).rt_rtvec))->elem[i]))->u.fld
[0]).rt_rtx),
    XEXP (XVECEXP (src, 0, i), 0)((((((((src)->u.fld[0]).rt_rtvec))->elem[i]))->u.fld
[0]).rt_rtx));
2792}

2794/* Move a group of registers represented by a PARALLEL into pseudos.  */

2796rtx
2797emit_group_move_into_temps (rtx src)
2798{
rtvec vec = rtvec_alloc (XVECLEN (src, 0)(((((src)->u.fld[0]).rt_rtvec))->num_elem));
int i;

for (i = 0; i < XVECLEN (src, 0)(((((src)->u.fld[0]).rt_rtvec))->num_elem); i++)
  {
    rtx e = XVECEXP (src, 0, i)(((((src)->u.fld[0]).rt_rtvec))->elem[i]);
    rtx d = XEXP (e, 0)(((e)->u.fld[0]).rt_rtx);

    if (d)
e = alloc_EXPR_LIST (REG_NOTE_KIND (e)((enum reg_note) ((machine_mode) (e)->mode)), copy_to_reg (d), XEXP (e, 1)(((e)->u.fld[1]).rt_rtx));
    RTVEC_ELT (vec, i)((vec)->elem[i]) = e;
  }

return gen_rtx_PARALLEL (GET_MODE (src), vec)gen_rtx_fmt_E_stat ((PARALLEL), ((((machine_mode) (src)->mode
))), ((vec)) );
2813}

2815/* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
 where SRC is non-consecutive registers represented by a PARALLEL.
 SSIZE represents the total size of block ORIG_DST, or -1 if not
 known.  */

2820void
2821emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED__attribute__ ((__unused__)),
  poly_int64 ssize)
2823{
rtx *tmps, dst;
int start, finish, i;
machine_mode m = GET_MODE (orig_dst)((machine_mode) (orig_dst)->mode);

gcc_assert (GET_CODE (src) == PARALLEL)((void)(!(((enum rtx_code) (src)->code) == PARALLEL) ? fancy_abort
 ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2828, __FUNCTION__), 0 : 0));

if (!SCALAR_INT_MODE_P (m)(((enum mode_class) mode_class[m]) == MODE_INT || ((enum mode_class
) mode_class[m]) == MODE_PARTIAL_INT)
    && !MEM_P (orig_dst)(((enum rtx_code) (orig_dst)->code) == MEM) && GET_CODE (orig_dst)((enum rtx_code) (orig_dst)->code) != CONCAT)
  {
    scalar_int_mode imode;
    if (int_mode_for_mode (GET_MODE (orig_dst)((machine_mode) (orig_dst)->mode)).exists (&imode))
{
 dst = gen_reg_rtx (imode);
 emit_group_store (dst, src, type, ssize);
 dst = gen_lowpartrtl_hooks.gen_lowpart (GET_MODE (orig_dst)((machine_mode) (orig_dst)->mode), dst);
}
    else
{
 dst = assign_stack_temp (GET_MODE (orig_dst)((machine_mode) (orig_dst)->mode), ssize);
 emit_group_store (dst, src, type, ssize);
}
    emit_move_insn (orig_dst, dst);
    return;
  }

/* Check for a NULL entry, used to indicate that the parameter goes
   both on the stack and in registers.  */
if (XEXP (XVECEXP (src, 0, 0), 0)((((((((src)->u.fld[0]).rt_rtvec))->elem[0]))->u.fld
[0]).rt_rtx))
  start = 0;
else
  start = 1;
finish = XVECLEN (src, 0)(((((src)->u.fld[0]).rt_rtvec))->num_elem);

tmps = XALLOCAVEC (rtx, finish)((rtx *) __builtin_alloca(sizeof (rtx) * (finish)));

/* Copy the (probable) hard regs into pseudos.  */
for (i = start; i < finish; i++)
  {
    rtx reg = XEXP (XVECEXP (src, 0, i), 0)((((((((src)->u.fld[0]).rt_rtvec))->elem[i]))->u.fld
[0]).rt_rtx);
    if (!REG_P (reg)(((enum rtx_code) (reg)->code) == REG) || REGNO (reg)(rhs_regno(reg)) < FIRST_PSEUDO_REGISTER76)
{
 tmps[i] = gen_reg_rtx (GET_MODE (reg)((machine_mode) (reg)->mode));
 emit_move_insn (tmps[i], reg);
}
    else
tmps[i] = reg;
  }

/* If we won't be storing directly into memory, protect the real destination
   from strange tricks we might play.  */
dst = orig_dst;
if (GET_CODE (dst)((enum rtx_code) (dst)->code) == PARALLEL)
  {
    rtx temp;

    /* We can get a PARALLEL dst if there is a conditional expression in
a return statement.  In that case, the dst and src are the same,
so no action is necessary.  */
    if (rtx_equal_p (dst, src))
return;

    /* It is unclear if we can ever reach here, but we may as well handle
it.  Allocate a temporary, and split this into a store/load to/from
the temporary.  */
    temp = assign_stack_temp (GET_MODE (dst)((machine_mode) (dst)->mode), ssize);
    emit_group_store (temp, src, type, ssize);
    emit_group_load (dst, temp, type, ssize);
    return;
  }
else if (!MEM_P (dst)(((enum rtx_code) (dst)->code) == MEM) && GET_CODE (dst)((enum rtx_code) (dst)->code) != CONCAT)
  {
    machine_mode outer = GET_MODE (dst)((machine_mode) (dst)->mode);
    machine_mode inner;
    poly_int64 bytepos;
    bool done = false;
    rtx temp;

    if (!REG_P (dst)(((enum rtx_code) (dst)->code) == REG) || REGNO (dst)(rhs_regno(dst)) < FIRST_PSEUDO_REGISTER76)
dst = gen_reg_rtx (outer);

    /* Make life a bit easier for combine: if the first element of the
vector is the low part of the destination mode, use a paradoxical
subreg to initialize the destination.  */
    if (start < finish)
{
 inner = GET_MODE (tmps[start])((machine_mode) (tmps[start])->mode);
 bytepos = subreg_lowpart_offset (inner, outer);
 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src, 0, start), 1)),(!maybe_ne (rtx_to_poly_int64 (((((((((src)->u.fld[0]).rt_rtvec
))->elem[start]))->u.fld[1]).rt_rtx)), bytepos))
	bytepos)(!maybe_ne (rtx_to_poly_int64 (((((((((src)->u.fld[0]).rt_rtvec
))->elem[start]))->u.fld[1]).rt_rtx)), bytepos)))
   {
     temp = simplify_gen_subreg (outer, tmps[start], inner, 0);
     if (temp)
{
  emit_move_insn (dst, temp);
  done = true;
  start++;
}
   }
}

    /* If the first element wasn't the low part, try the last.  */
    if (!done
 && start < finish - 1)
{
 inner = GET_MODE (tmps[finish - 1])((machine_mode) (tmps[finish - 1])->mode);
 bytepos = subreg_lowpart_offset (inner, outer);
 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src, 0,(!maybe_ne (rtx_to_poly_int64 (((((((((src)->u.fld[0]).rt_rtvec
))->elem[finish - 1]))->u.fld[1]).rt_rtx)), bytepos))
					  finish - 1), 1)),(!maybe_ne (rtx_to_poly_int64 (((((((((src)->u.fld[0]).rt_rtvec
))->elem[finish - 1]))->u.fld[1]).rt_rtx)), bytepos))
	bytepos)(!maybe_ne (rtx_to_poly_int64 (((((((((src)->u.fld[0]).rt_rtvec
))->elem[finish - 1]))->u.fld[1]).rt_rtx)), bytepos)))
   {
     temp = simplify_gen_subreg (outer, tmps[finish - 1], inner, 0);
     if (temp)
{
  emit_move_insn (dst, temp);
  done = true;
  finish--;
}
   }
}

    /* Otherwise, simply initialize the result to zero.  */
    if (!done)
      emit_move_insn (dst, CONST0_RTX (outer)(const_tiny_rtx[0][(int) (outer)]));
  }

/* Process the pieces.  */
for (i = start; i < finish; i++)
  {
    poly_int64 bytepos = rtx_to_poly_int64 (XEXP (XVECEXP (src, 0, i), 1)((((((((src)->u.fld[0]).rt_rtvec))->elem[i]))->u.fld
[1]).rt_rtx));
    machine_mode mode = GET_MODE (tmps[i])((machine_mode) (tmps[i])->mode);
    poly_int64 bytelen = GET_MODE_SIZE (mode);
    poly_uint64 adj_bytelen;
    rtx dest = dst;

    /* Handle trailing fragments that run over the size of the struct.
It's the target's responsibility to make sure that the fragment
cannot be strictly smaller in some cases and strictly larger
in others.  */
    gcc_checking_assert (ordered_p (bytepos + bytelen, ssize))((void)(!(ordered_p (bytepos + bytelen, ssize)) ? fancy_abort
 ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2962, __FUNCTION__), 0 : 0));
    if (known_size_p (ssize) && maybe_gt (bytepos + bytelen, ssize)maybe_lt (ssize, bytepos + bytelen))
adj_bytelen = ssize - bytepos;
    else
adj_bytelen = bytelen;

    /* Deal with destination CONCATs by either storing into one of the parts
or doing a copy after storing into a register or stack temporary.  */
    if (GET_CODE (dst)((enum rtx_code) (dst)->code) == CONCAT)
{
 if (known_le (bytepos + adj_bytelen,(!maybe_lt (GET_MODE_SIZE (((machine_mode) ((((dst)->u.fld
[0]).rt_rtx))->mode)), bytepos + adj_bytelen))
	GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))(!maybe_lt (GET_MODE_SIZE (((machine_mode) ((((dst)->u.fld
[0]).rt_rtx))->mode)), bytepos + adj_bytelen)))
   dest = XEXP (dst, 0)(((dst)->u.fld[0]).rt_rtx);

 else if (known_ge (bytepos, GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))(!maybe_lt (bytepos, GET_MODE_SIZE (((machine_mode) ((((dst)->
u.fld[0]).rt_rtx))->mode)))))
   {
     bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))((machine_mode) ((((dst)->u.fld[0]).rt_rtx))->mode));
     dest = XEXP (dst, 1)(((dst)->u.fld[1]).rt_rtx);
   }

 else
   {
     machine_mode dest_mode = GET_MODE (dest)((machine_mode) (dest)->mode);
     machine_mode tmp_mode = GET_MODE (tmps[i])((machine_mode) (tmps[i])->mode);
     scalar_int_mode dest_imode;

     gcc_assert (known_eq (bytepos, 0) && XVECLEN (src, 0))((void)(!((!maybe_ne (bytepos, 0)) && (((((src)->u
.fld[0]).rt_rtvec))->num_elem)) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 2988, __FUNCTION__), 0 : 0));

     /* If the source is a single scalar integer register, and the
 destination has a complex mode for which a same-sized integer
 mode exists, then we can take the left-justified part of the
 source in the complex mode.  */
     if (finish == start + 1
  && REG_P (tmps[i])(((enum rtx_code) (tmps[i])->code) == REG)
  && SCALAR_INT_MODE_P (tmp_mode)(((enum mode_class) mode_class[tmp_mode]) == MODE_INT || ((enum
 mode_class) mode_class[tmp_mode]) == MODE_PARTIAL_INT)
  && COMPLEX_MODE_P (dest_mode)(((enum mode_class) mode_class[dest_mode]) == MODE_COMPLEX_INT
 || ((enum mode_class) mode_class[dest_mode]) == MODE_COMPLEX_FLOAT
)
  && int_mode_for_mode (dest_mode).exists (&dest_imode))
{
  const scalar_int_mode tmp_imode
    = as_a <scalar_int_mode> (tmp_mode);

  if (GET_MODE_BITSIZE (dest_imode)
      < GET_MODE_BITSIZE (tmp_imode))
    {
      dest = gen_reg_rtx (dest_imode);
      if (BYTES_BIG_ENDIAN0)
	tmps[i] = expand_shift (RSHIFT_EXPR, tmp_mode, tmps[i],
				GET_MODE_BITSIZE (tmp_imode)
				- GET_MODE_BITSIZE (dest_imode),
				NULL_RTX(rtx) 0, 1);
      emit_move_insn (dest, gen_lowpartrtl_hooks.gen_lowpart (dest_imode, tmps[i]));
      dst = gen_lowpartrtl_hooks.gen_lowpart (dest_mode, dest);
    }
  else
    dst = gen_lowpartrtl_hooks.gen_lowpart (dest_mode, tmps[i]);
}

     /* Otherwise spill the source onto the stack using the more
 aligned of the two modes.  */
     else if (GET_MODE_ALIGNMENT (dest_mode)get_mode_alignment (dest_mode)
       >= GET_MODE_ALIGNMENT (tmp_mode)get_mode_alignment (tmp_mode))
{
  dest = assign_stack_temp (dest_mode,
			    GET_MODE_SIZE (dest_mode));
  emit_move_insn (adjust_address (dest, tmp_mode, bytepos)adjust_address_1 (dest, tmp_mode, bytepos, 1, 1, 0, 0),
		  tmps[i]);
  dst = dest;
}

     else
{
  dest = assign_stack_temp (tmp_mode,
			    GET_MODE_SIZE (tmp_mode));
  emit_move_insn (dest, tmps[i]);
  dst = adjust_address (dest, dest_mode, bytepos)adjust_address_1 (dest, dest_mode, bytepos, 1, 1, 0, 0);
}

     break;
   }
}

    /* Handle trailing fragments that run over the size of the struct.  */
    if (known_size_p (ssize) && maybe_gt (bytepos + bytelen, ssize)maybe_lt (ssize, bytepos + bytelen))
{
 /* store_bit_field always takes its value from the lsb.
    Move the fragment to the lsb if it's not already there.  */
 if (
3049#ifdef BLOCK_REG_PADDING
     BLOCK_REG_PADDING (GET_MODE (orig_dst)((machine_mode) (orig_dst)->mode), type, i == start)
     == (BYTES_BIG_ENDIAN0 ? PAD_UPWARD : PAD_DOWNWARD)
3052#else
     BYTES_BIG_ENDIAN0
3054#endif
     )
   {
     poly_int64 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT(8);
     tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
		      shift, tmps[i], 0);
   }

 /* Make sure not to write past the end of the struct.  */
 store_bit_field (dest,
	   adj_bytelen * BITS_PER_UNIT(8), bytepos * BITS_PER_UNIT(8),
	   bytepos * BITS_PER_UNIT(8), ssize * BITS_PER_UNIT(8) - 1,
	   VOIDmode((void) 0, E_VOIDmode), tmps[i], false, false);
}

    /* Optimize the access just a bit.  */
    else if (MEM_P (dest)(((enum rtx_code) (dest)->code) == MEM)
      && (!targetm.slow_unaligned_access (mode, MEM_ALIGN (dest)(get_mem_attrs (dest)->align))
   || MEM_ALIGN (dest)(get_mem_attrs (dest)->align) >= GET_MODE_ALIGNMENT (mode)get_mode_alignment (mode))
      && multiple_p (bytepos * BITS_PER_UNIT(8),
	      GET_MODE_ALIGNMENT (mode)get_mode_alignment (mode))
      && known_eq (bytelen, GET_MODE_SIZE (mode))(!maybe_ne (bytelen, GET_MODE_SIZE (mode))))
emit_move_insn (adjust_address (dest, mode, bytepos)adjust_address_1 (dest, mode, bytepos, 1, 1, 0, 0), tmps[i]);

    else
store_bit_field (dest, bytelen * BITS_PER_UNIT(8), bytepos * BITS_PER_UNIT(8),
	 0, 0, mode, tmps[i], false, false);
  }

/* Copy from the pseudo into the (probable) hard reg.  */
if (orig_dst != dst)
  emit_move_insn (orig_dst, dst);
3086}

3088/* Return a form of X that does not use a PARALLEL.  TYPE is the type
 of the value stored in X.  */

3091rtx
3092maybe_emit_group_store (rtx x, tree type)
3093{
machine_mode mode = TYPE_MODE (type)((((enum tree_code) ((tree_class_check ((type), (tcc_type), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3094, __FUNCTION__)))->base.code) == VECTOR_TYPE) ? vector_type_mode
 (type) : (type)->type_common.mode);
gcc_checking_assert (GET_MODE (x) == VOIDmode || GET_MODE (x) == mode)((void)(!(((machine_mode) (x)->mode) == ((void) 0, E_VOIDmode
) || ((machine_mode) (x)->mode) == mode) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3095, __FUNCTION__), 0 : 0));
if (GET_CODE (x)((enum rtx_code) (x)->code) == PARALLEL)
  {
    rtx result = gen_reg_rtx (mode);
    emit_group_store (result, x, type, int_size_in_bytes (type));
    return result;
  }
return x;
3103}

3105/* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.

 This is used on targets that return BLKmode values in registers.  */

3109static void
3110copy_blkmode_from_reg (rtx target, rtx srcreg, tree type)
3111{
unsigned HOST_WIDE_INTlong bytes = int_size_in_bytes (type);
rtx src = NULLnullptr, dst = NULLnullptr;
unsigned HOST_WIDE_INTlong bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD)(((((tree_class_check ((type), (tcc_type), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3114, __FUNCTION__))->type_common.align) ? ((unsigned)1)
 << (((tree_class_check ((type), (tcc_type), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3114, __FUNCTION__))->type_common.align) - 1) : 0)) <
 (((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4))) ? ((((tree_class_check ((type), (tcc_type
), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3114, __FUNCTION__))->type_common.align) ? ((unsigned)1)
 << (((tree_class_check ((type), (tcc_type), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3114, __FUNCTION__))->type_common.align) - 1) : 0)) : ((
(8) * (((global_options.x_ix86_isa_flags & (1UL << 1
)) != 0) ? 8 : 4))));
unsigned HOST_WIDE_INTlong bitpos, xbitpos, padding_correction = 0;
/* No current ABI uses variable-sized modes to pass a BLKmnode type.  */
fixed_size_mode mode = as_a <fixed_size_mode> (GET_MODE (srcreg)((machine_mode) (srcreg)->mode));
fixed_size_mode tmode = as_a <fixed_size_mode> (GET_MODE (target)((machine_mode) (target)->mode));
fixed_size_mode copy_mode;

/* BLKmode registers created in the back-end shouldn't have survived.  */
gcc_assert (mode != BLKmode)((void)(!(mode != ((void) 0, E_BLKmode)) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3122, __FUNCTION__), 0 : 0));

/* If the structure doesn't take up a whole number of words, see whether
   SRCREG is padded on the left or on the right.  If it's on the left,
   set PADDING_CORRECTION to the number of bits to skip.

   In most ABIs, the structure will be returned at the least end of
   the register, which translates to right padding on little-endian
   targets and left padding on big-endian targets.  The opposite
   holds if the structure is returned at the most significant
   end of the register.  */
if (bytes % UNITS_PER_WORD(((global_options.x_ix86_isa_flags & (1UL << 1)) !=
 0) ? 8 : 4) != 0
    && (targetm.calls.return_in_msb (type)
 ? !BYTES_BIG_ENDIAN0
 : BYTES_BIG_ENDIAN0))
  padding_correction
    = (BITS_PER_WORD((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4)) - ((bytes % UNITS_PER_WORD(((global_options.x_ix86_isa_flags & (1UL << 1)) !=
 0) ? 8 : 4)) * BITS_PER_UNIT(8)));

/* We can use a single move if we have an exact mode for the size.  */
else if (MEM_P (target)(((enum rtx_code) (target)->code) == MEM)
  && (!targetm.slow_unaligned_access (mode, MEM_ALIGN (target)(get_mem_attrs (target)->align))
      || MEM_ALIGN (target)(get_mem_attrs (target)->align) >= GET_MODE_ALIGNMENT (mode)get_mode_alignment (mode))
  && bytes == GET_MODE_SIZE (mode))
{
  emit_move_insn (adjust_address (target, mode, 0)adjust_address_1 (target, mode, 0, 1, 1, 0, 0), srcreg);
  return;
}

/* And if we additionally have the same mode for a register.  */
else if (REG_P (target)(((enum rtx_code) (target)->code) == REG)
  && GET_MODE (target)((machine_mode) (target)->mode) == mode
  && bytes == GET_MODE_SIZE (mode))
{
  emit_move_insn (target, srcreg);
  return;
}

/* This code assumes srcreg is at least a full word.  If it isn't, copy it
   into a new pseudo which is a full word.  */
if (GET_MODE_SIZE (mode) < UNITS_PER_WORD(((global_options.x_ix86_isa_flags & (1UL << 1)) !=
 0) ? 8 : 4))
  {
    srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type)((tree_class_check ((type), (tcc_type), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3163, __FUNCTION__))->base.u.bits.unsigned_flag));
    mode = word_mode;
  }

/* Copy the structure BITSIZE bits at a time.  If the target lives in
   memory, take care of not reading/writing past its end by selecting
   a copy mode suited to BITSIZE.  This should always be possible given
   how it is computed.

   If the target lives in register, make sure not to select a copy mode
   larger than the mode of the register.

   We could probably emit more efficient code for machines which do not use
   strict alignment, but it doesn't seem worth the effort at the current
   time.  */

copy_mode = word_mode;
if (MEM_P (target)(((enum rtx_code) (target)->code) == MEM))
  {
    opt_scalar_int_mode mem_mode = int_mode_for_size (bitsize, 1);
    if (mem_mode.exists ())
copy_mode = mem_mode.require ();
  }
else if (REG_P (target)(((enum rtx_code) (target)->code) == REG) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4)))
  copy_mode = tmode;

for (bitpos = 0, xbitpos = padding_correction;
     bitpos < bytes * BITS_PER_UNIT(8);
     bitpos += bitsize, xbitpos += bitsize)
  {
    /* We need a new source operand each time xbitpos is on a
word boundary and when xbitpos == padding_correction
(the first time through).  */
    if (xbitpos % BITS_PER_WORD((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4)) == 0 || xbitpos == padding_correction)
src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4)), mode);

    /* We need a new destination operand each time bitpos is on
a word boundary.  */
    if (REG_P (target)(((enum rtx_code) (target)->code) == REG) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4)))
dst = target;
    else if (bitpos % BITS_PER_WORD((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4)) == 0)
dst = operand_subword (target, bitpos / BITS_PER_WORD((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4)), 1, tmode);

    /* Use xbitpos for the source extraction (right justified) and
bitpos for the destination store (left justified).  */
    store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4)), 0, 0, copy_mode,
       extract_bit_field (src, bitsize,
			  xbitpos % BITS_PER_WORD((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4)), 1,
			  NULL_RTX(rtx) 0, copy_mode, copy_mode,
			  false, NULLnullptr),
       false, false);
  }
3215}

3217/* Copy BLKmode value SRC into a register of mode MODE_IN.  Return the
 register if it contains any data, otherwise return null.

 This is used on targets that return BLKmode values in registers.  */

3222rtx
3223copy_blkmode_to_reg (machine_mode mode_in, tree src)
3224{
int i, n_regs;
unsigned HOST_WIDE_INTlong bitpos, xbitpos, padding_correction = 0, bytes;
unsigned int bitsize;
rtx *dst_words, dst, x, src_word = NULL_RTX(rtx) 0, dst_word = NULL_RTX(rtx) 0;
/* No current ABI uses variable-sized modes to pass a BLKmnode type.  */
fixed_size_mode mode = as_a <fixed_size_mode> (mode_in);
fixed_size_mode dst_mode;
scalar_int_mode min_mode;

gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode)((void)(!(((((enum tree_code) ((tree_class_check ((((contains_struct_check
 ((src), (TS_TYPED), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3234, __FUNCTION__))->typed.type)), (tcc_type), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3234, __FUNCTION__)))->base.code) == VECTOR_TYPE) ? vector_type_mode
 (((contains_struct_check ((src), (TS_TYPED), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3234, __FUNCTION__))->typed.type)) : (((contains_struct_check
 ((src), (TS_TYPED), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3234, __FUNCTION__))->typed.type))->type_common.mode)
 == ((void) 0, E_BLKmode)) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3234, __FUNCTION__), 0 : 0));
1
Assuming field 'code' is equal to VECTOR_TYPE→
2
←
'?' condition is true→
3
←
Assuming the condition is true→
4
←
'?' condition is false→

x = expand_normal (src);

bytes = arg_int_size_in_bytes (TREE_TYPE (src)((contains_struct_check ((src), (TS_TYPED), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3238, __FUNCTION__))->typed.type));
if (bytes == 0)
5
←
Assuming 'bytes' is not equal to 0→
  return NULL_RTX(rtx) 0;

/* If the structure doesn't take up a whole number of words, see
   whether the register value should be padded on the left or on
   the right.  Set PADDING_CORRECTION to the number of padding
   bits needed on the left side.

   In most ABIs, the structure will be returned at the least end of
   the register, which translates to right padding on little-endian
   targets and left padding on big-endian targets.  The opposite
   holds if the structure is returned at the most significant
   end of the register.  */
if (bytes % UNITS_PER_WORD(((global_options.x_ix86_isa_flags & (1UL << 1)) !=
 0) ? 8 : 4) != 0
6
←
Assuming the condition is true→
7
←
'?' condition is true→
8
←
Assuming the condition is false→
    && (targetm.calls.return_in_msb (TREE_TYPE (src)((contains_struct_check ((src), (TS_TYPED), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3253, __FUNCTION__))->typed.type))
 ? !BYTES_BIG_ENDIAN0
 : BYTES_BIG_ENDIAN0))
  padding_correction = (BITS_PER_WORD((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4)) - ((bytes % UNITS_PER_WORD(((global_options.x_ix86_isa_flags & (1UL << 1)) !=
 0) ? 8 : 4))
			   * BITS_PER_UNIT(8)));

n_regs = (bytes + UNITS_PER_WORD(((global_options.x_ix86_isa_flags & (1UL << 1)) !=
 0) ? 8 : 4) - 1) / UNITS_PER_WORD(((global_options.x_ix86_isa_flags & (1UL << 1)) !=
 0) ? 8 : 4);
9
←
'?' condition is true→
10
←
'?' condition is true→
dst_words = XALLOCAVEC (rtx, n_regs)((rtx *) __builtin_alloca(sizeof (rtx) * (n_regs)));
bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD)(((((tree_class_check ((((contains_struct_check ((src), (TS_TYPED
), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3261, __FUNCTION__))->typed.type)), (tcc_type), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3261, __FUNCTION__))->type_common.align) ? ((unsigned)1)
 << (((tree_class_check ((((contains_struct_check ((src
), (TS_TYPED), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3261, __FUNCTION__))->typed.type)), (tcc_type), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3261, __FUNCTION__))->type_common.align) - 1) : 0)) <
 (((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4))) ? ((((tree_class_check ((((contains_struct_check
 ((src), (TS_TYPED), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3261, __FUNCTION__))->typed.type)), (tcc_type), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3261, __FUNCTION__))->type_common.align) ? ((unsigned)1)
 << (((tree_class_check ((((contains_struct_check ((src
), (TS_TYPED), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3261, __FUNCTION__))->typed.type)), (tcc_type), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3261, __FUNCTION__))->type_common.align) - 1) : 0)) : ((
(8) * (((global_options.x_ix86_isa_flags & (1UL << 1
)) != 0) ? 8 : 4))));
11
←
Assuming field 'align' is 0→
12
←
'?' condition is false→
13
←
'?' condition is true→
14
←
'?' condition is true→
15
←
'?' condition is false→
min_mode = smallest_int_mode_for_size (bitsize);

/* Copy the structure BITSIZE bits at a time.  */
for (bitpos = 0, xbitpos = padding_correction;
17
←
Loop condition is false. Execution continues on line 3318→
     bitpos < bytes * BITS_PER_UNIT(8);
16
←
Assuming the condition is false→
     bitpos += bitsize, xbitpos += bitsize)
  {
    /* We need a new destination pseudo each time xbitpos is
on a word boundary and when xbitpos == padding_correction
(the first time through).  */
    if (xbitpos % BITS_PER_WORD((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4)) == 0
 || xbitpos == padding_correction)
{
 /* Generate an appropriate register.  */
 dst_word = gen_reg_rtx (word_mode);
 dst_words[xbitpos / BITS_PER_WORD((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4))] = dst_word;

 /* Clear the destination before we move anything into it.  */
 emit_move_insn (dst_word, CONST0_RTX (word_mode)(const_tiny_rtx[0][(int) (word_mode)]));
}

    /* Find the largest integer mode that can be used to copy all or as
many bits as possible of the structure if the target supports larger
copies.  There are too many corner cases here w.r.t to alignments on
the read/writes.  So if there is any padding just use single byte
operations.  */
    opt_scalar_int_mode mode_iter;
    if (padding_correction == 0 && !STRICT_ALIGNMENT0)
{
 FOR_EACH_MODE_FROM (mode_iter, min_mode)for ((mode_iter) = (min_mode); mode_iterator::iterate_p (&
(mode_iter)); mode_iterator::get_next (&(mode_iter)))
   {
     unsigned int msize = GET_MODE_BITSIZE (mode_iter.require ());
     if (msize <= ((bytes * BITS_PER_UNIT(8)) - bitpos)
  && msize <= BITS_PER_WORD((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4)))
bitsize = msize;
     else
break;
   }
}

    /* We need a new source operand each time bitpos is on a word
boundary.  */
    if (bitpos % BITS_PER_WORD((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4)) == 0)
src_word = operand_subword_force (x, bitpos / BITS_PER_WORD((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4)), BLKmode((void) 0, E_BLKmode));

    /* Use bitpos for the source extraction (left justified) and
xbitpos for the destination store (right justified).  */
    store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4)),
       0, 0, word_mode,
       extract_bit_field (src_word, bitsize,
			  bitpos % BITS_PER_WORD((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4)), 1,
			  NULL_RTX(rtx) 0, word_mode, word_mode,
			  false, NULLnullptr),
       false, false);
  }

if (mode == BLKmode((void) 0, E_BLKmode))
18
←
Assuming the condition is false→
19
←
Taking false branch→
  {
    /* Find the smallest integer mode large enough to hold the
entire structure.  */
    opt_scalar_int_mode mode_iter;
    FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)for (mode_iterator::start (&(mode_iter), MODE_INT); mode_iterator
::iterate_p (&(mode_iter)); mode_iterator::get_next (&
(mode_iter)))
if (GET_MODE_SIZE (mode_iter.require ()) >= bytes)
 break;

    /* A suitable mode should have been found.  */
    mode = mode_iter.require ();
  }

if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode))
20
←
Assuming the condition is false→
21
←
Taking false branch→
  dst_mode = word_mode;
else
  dst_mode = mode;
dst = gen_reg_rtx (dst_mode);

for (i = 0; i < n_regs; i++)
22
←
The value 0 is assigned to 'i'→
23
←
Assuming 'i' is < 'n_regs'→
24
←
Loop condition is true.  Entering loop body→
  emit_move_insn (operand_subword (dst, i, 0, dst_mode), dst_words[i]);
25
←
2nd function call argument is an uninitialized value

if (mode != dst_mode)
  dst = gen_lowpartrtl_hooks.gen_lowpart (mode, dst);

return dst;
3344}

3346/* Add a USE expression for REG to the (possibly empty) list pointed
 to by CALL_FUSAGE.  REG must denote a hard register.  */

3349void
3350use_reg_mode (rtx *call_fusage, rtx reg, machine_mode mode)
3351{
gcc_assert (REG_P (reg))((void)(!((((enum rtx_code) (reg)->code) == REG)) ? fancy_abort
 ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3352, __FUNCTION__), 0 : 0));

if (!HARD_REGISTER_P (reg)((((rhs_regno(reg))) < 76)))
  return;

*call_fusage
  = gen_rtx_EXPR_LIST (mode, gen_rtx_USE (VOIDmode, reg)gen_rtx_fmt_e_stat ((USE), ((((void) 0, E_VOIDmode))), ((reg)
) ), *call_fusage);
3359}

3361/* Add a CLOBBER expression for REG to the (possibly empty) list pointed
 to by CALL_FUSAGE.  REG must denote a hard register.  */

3364void
3365clobber_reg_mode (rtx *call_fusage, rtx reg, machine_mode mode)
3366{
gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER)((void)(!((((enum rtx_code) (reg)->code) == REG) &&
 (rhs_regno(reg)) < 76) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3367, __FUNCTION__), 0 : 0));

*call_fusage
  = gen_rtx_EXPR_LIST (mode, gen_rtx_CLOBBER (VOIDmode, reg)gen_rtx_fmt_e_stat ((CLOBBER), ((((void) 0, E_VOIDmode))), ((
reg)) ), *call_fusage);
3371}

3373/* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
 starting at REGNO.  All of these registers must be hard registers.  */

3376void
3377use_regs (rtx *call_fusage, int regno, int nregs)
3378{
int i;

gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER)((void)(!(regno + nregs <= 76) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3381, __FUNCTION__), 0 : 0));

for (i = 0; i < nregs; i++)
  use_reg (call_fusage, regno_reg_rtx[regno + i]);
3385}

3387/* Add USE expressions to *CALL_FUSAGE for each REG contained in the
 PARALLEL REGS.  This is for calls that pass values in multiple
 non-contiguous locations.  The Irix 6 ABI has examples of this.  */

3391void
3392use_group_regs (rtx *call_fusage, rtx regs)
3393{
int i;

for (i = 0; i < XVECLEN (regs, 0)(((((regs)->u.fld[0]).rt_rtvec))->num_elem); i++)
  {
    rtx reg = XEXP (XVECEXP (regs, 0, i), 0)((((((((regs)->u.fld[0]).rt_rtvec))->elem[i]))->u.fld
[0]).rt_rtx);

    /* A NULL entry means the parameter goes both on the stack and in
registers.  This can also be a MEM for targets that pass values
partially on the stack and partially in registers.  */
    if (reg != 0 && REG_P (reg)(((enum rtx_code) (reg)->code) == REG))
use_reg (call_fusage, reg);
  }
3406}

3408/* Return the defining gimple statement for SSA_NAME NAME if it is an
 assigment and the code of the expresion on the RHS is CODE.  Return
 NULL otherwise.  */

3412static gimple *
3413get_def_for_expr (tree name, enum tree_code code)
3414{
gimple *def_stmt;

if (TREE_CODE (name)((enum tree_code) (name)->base.code) != SSA_NAME)
  return NULLnullptr;

def_stmt = get_gimple_for_ssa_name (name);
if (!def_stmt
    || gimple_assign_rhs_code (def_stmt) != code)
  return NULLnullptr;

return def_stmt;
3426}

3428/* Return the defining gimple statement for SSA_NAME NAME if it is an
 assigment and the class of the expresion on the RHS is CLASS.  Return
 NULL otherwise.  */

3432static gimple *
3433get_def_for_expr_class (tree name, enum tree_code_class tclass)
3434{
gimple *def_stmt;

if (TREE_CODE (name)((enum tree_code) (name)->base.code) != SSA_NAME)
  return NULLnullptr;

def_stmt = get_gimple_for_ssa_name (name);
if (!def_stmt
    || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt))tree_code_type_tmpl <0>::tree_code_type[(int) (gimple_assign_rhs_code
 (def_stmt))] != tclass)
  return NULLnullptr;

return def_stmt;
3446}
3447
3448/* Write zeros through the storage of OBJECT.  If OBJECT has BLKmode, SIZE is
 its length in bytes.  */

3451rtx
3452clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
     unsigned int expected_align, HOST_WIDE_INTlong expected_size,
     unsigned HOST_WIDE_INTlong min_size,
     unsigned HOST_WIDE_INTlong max_size,
     unsigned HOST_WIDE_INTlong probable_max_size,
     unsigned ctz_size)
3458{
machine_mode mode = GET_MODE (object)((machine_mode) (object)->mode);
unsigned int align;

gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL)((void)(!(method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL
) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3462, __FUNCTION__), 0 : 0));

/* If OBJECT is not BLKmode and SIZE is the same size as its mode,
   just move a zero.  Otherwise, do this a piece at a time.  */
poly_int64 size_val;
if (mode != BLKmode((void) 0, E_BLKmode)
    && poly_int_rtx_p (size, &size_val)
    && known_eq (size_val, GET_MODE_SIZE (mode))(!maybe_ne (size_val, GET_MODE_SIZE (mode))))
  {
    rtx zero = CONST0_RTX (mode)(const_tiny_rtx[0][(int) (mode)]);
    if (zero != NULLnullptr)
{
 emit_move_insn (object, zero);
 return NULLnullptr;
}

    if (COMPLEX_MODE_P (mode)(((enum mode_class) mode_class[mode]) == MODE_COMPLEX_INT || (
(enum mode_class) mode_class[mode]) == MODE_COMPLEX_FLOAT))
{
 zero = CONST0_RTX (GET_MODE_INNER (mode))(const_tiny_rtx[0][(int) ((mode_to_inner (mode)))]);
 if (zero != NULLnullptr)
   {
     write_complex_part (object, zero, 0, true);
     write_complex_part (object, zero, 1, false);
     return NULLnullptr;
   }
}
  }

if (size == const0_rtx(const_int_rtx[64]))
  return NULLnullptr;

align = MEM_ALIGN (object)(get_mem_attrs (object)->align);

if (CONST_INT_P (size)(((enum rtx_code) (size)->code) == CONST_INT)
    && targetm.use_by_pieces_infrastructure_p (INTVAL (size)((size)->u.hwint[0]), align,
				 CLEAR_BY_PIECES,
				 optimize_insn_for_speed_p ()))
  clear_by_pieces (object, INTVAL (size)((size)->u.hwint[0]), align);
else if (set_storage_via_setmem (object, size, const0_rtx(const_int_rtx[64]), align,
		   expected_align, expected_size,
		   min_size, max_size, probable_max_size))
  ;
else if (try_store_by_multiple_pieces (object, size, ctz_size,
			 min_size, max_size,
			 NULL_RTX(rtx) 0, 0, align))
  ;
else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object))(((get_mem_attrs (object)->addrspace)) == 0))
  return set_storage_via_libcall (object, size, const0_rtx(const_int_rtx[64]),
		    method == BLOCK_OP_TAILCALL);
else
  gcc_unreachable ()(fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3512, __FUNCTION__));

return NULLnullptr;
3515}

3517rtx
3518clear_storage (rtx object, rtx size, enum block_op_methods method)
3519{
unsigned HOST_WIDE_INTlong max, min = 0;
if (GET_CODE (size)((enum rtx_code) (size)->code) == CONST_INT)
  min = max = UINTVAL (size)((unsigned long) ((size)->u.hwint[0]));
else
  max = GET_MODE_MASK (GET_MODE (size))mode_mask_array[((machine_mode) (size)->mode)];
return clear_storage_hints (object, size, method, 0, -1, min, max, max, 0);
3526}


3529/* A subroutine of clear_storage.  Expand a call to memset.
 Return the return value of memset, 0 otherwise.  */

3532rtx
3533set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
3534{
tree call_expr, fn, object_tree, size_tree, val_tree;
machine_mode size_mode;

object = copy_addr_to_reg (XEXP (object, 0)(((object)->u.fld[0]).rt_rtx));
object_tree = make_tree (ptr_type_nodeglobal_trees[TI_PTR_TYPE], object);

if (!CONST_INT_P (val)(((enum rtx_code) (val)->code) == CONST_INT))
  val = convert_to_mode (TYPE_MODE (integer_type_node)((((enum tree_code) ((tree_class_check ((integer_types[itk_int
]), (tcc_type), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3542, __FUNCTION__)))->base.code) == VECTOR_TYPE) ? vector_type_mode
 (integer_types[itk_int]) : (integer_types[itk_int])->type_common
.mode), val, 1);
val_tree = make_tree (integer_type_nodeinteger_types[itk_int], val);

size_mode = TYPE_MODE (sizetype)((((enum tree_code) ((tree_class_check ((sizetype_tab[(int) stk_sizetype
]), (tcc_type), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3545, __FUNCTION__)))->base.code) == VECTOR_TYPE) ? vector_type_mode
 (sizetype_tab[(int) stk_sizetype]) : (sizetype_tab[(int) stk_sizetype
])->type_common.mode);
size = convert_to_mode (size_mode, size, 1);
size = copy_to_mode_reg (size_mode, size);
size_tree = make_tree (sizetypesizetype_tab[(int) stk_sizetype], size);

/* It is incorrect to use the libcall calling conventions for calls to
   memset because it can be provided by the user.  */
fn = builtin_decl_implicit (BUILT_IN_MEMSET);
call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
CALL_EXPR_TAILCALL (call_expr)((tree_check ((call_expr), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3554, __FUNCTION__, (CALL_EXPR)))->base.addressable_flag
) = tailcall;

return expand_call (call_expr, NULL_RTX(rtx) 0, false);
3557}
3558
3559/* Expand a setmem pattern; return true if successful.  */

3561bool
3562set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
	unsigned int expected_align, HOST_WIDE_INTlong expected_size,
	unsigned HOST_WIDE_INTlong min_size,
	unsigned HOST_WIDE_INTlong max_size,
	unsigned HOST_WIDE_INTlong probable_max_size)
3567{
/* Try the most limited insn first, because there's no point
   including more than one in the machine description unless
   the more limited one has some advantage.  */

if (expected_align < align)
  expected_align = align;
if (expected_size != -1)
  {
    if ((unsigned HOST_WIDE_INTlong)expected_size > max_size)
expected_size = max_size;
    if ((unsigned HOST_WIDE_INTlong)expected_size < min_size)
expected_size = min_size;
  }

opt_scalar_int_mode mode_iter;
FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)for (mode_iterator::start (&(mode_iter), MODE_INT); mode_iterator
::iterate_p (&(mode_iter)); mode_iterator::get_next (&
(mode_iter)))
  {
    scalar_int_mode mode = mode_iter.require ();
    enum insn_code code = direct_optab_handler (setmem_optab, mode);

    if (code != CODE_FOR_nothing
 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
    here because if SIZE is less than the mode mask, as it is
    returned by the macro, it will definitely be less than the
    actual mode mask.  Since SIZE is within the Pmode address
    space, we limit MODE to Pmode.  */
 && ((CONST_INT_P (size)(((enum rtx_code) (size)->code) == CONST_INT)
      && ((unsigned HOST_WIDE_INTlong) INTVAL (size)((size)->u.hwint[0])
   <= (GET_MODE_MASK (mode)mode_mask_array[mode] >> 1)))
     || max_size <= (GET_MODE_MASK (mode)mode_mask_array[mode] >> 1)
     || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode(global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode (
(scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode))))))
{
 class expand_operand ops[9];
 unsigned int nops;

 nops = insn_data[(int) code].n_generator_args;
 gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9)((void)(!(nops == 4 || nops == 6 || nops == 8 || nops == 9) ?
 fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3604, __FUNCTION__), 0 : 0));

 create_fixed_operand (&ops[0], object);
 /* The check above guarantees that this size conversion is valid.  */
 create_convert_operand_to (&ops[1], size, mode, true);
 create_convert_operand_from (&ops[2], val, byte_mode, true);
 create_integer_operand (&ops[3], align / BITS_PER_UNIT(8));
 if (nops >= 6)
   {
     create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT(8));
     create_integer_operand (&ops[5], expected_size);
   }
 if (nops >= 8)
   {
     create_integer_operand (&ops[6], min_size);
     /* If we cannot represent the maximal size,
 make parameter NULL.  */
     if ((HOST_WIDE_INTlong) max_size != -1)
       create_integer_operand (&ops[7], max_size);
     else
create_fixed_operand (&ops[7], NULLnullptr);
   }
 if (nops == 9)
   {
     /* If we cannot represent the maximal size,
 make parameter NULL.  */
     if ((HOST_WIDE_INTlong) probable_max_size != -1)
       create_integer_operand (&ops[8], probable_max_size);
     else
create_fixed_operand (&ops[8], NULLnullptr);
   }
 if (maybe_expand_insn (code, nops, ops))
   return true;
}
  }

return false;
3641}

3643
3644/* Write to one of the components of the complex value CPLX.  Write VAL to
 the real part if IMAG_P is false, and the imaginary part if its true.
 If UNDEFINED_P then the value in CPLX is currently undefined.  */

3648void
3649write_complex_part (rtx cplx, rtx val, bool imag_p, bool undefined_p)
3650{
machine_mode cmode;
scalar_mode imode;
unsigned ibitsize;

if (GET_CODE (cplx)((enum rtx_code) (cplx)->code) == CONCAT)
  {
    emit_move_insn (XEXP (cplx, imag_p)(((cplx)->u.fld[imag_p]).rt_rtx), val);
    return;
  }

cmode = GET_MODE (cplx)((machine_mode) (cplx)->mode);
imode = GET_MODE_INNER (cmode)(mode_to_inner (cmode));
ibitsize = GET_MODE_BITSIZE (imode);

/* For MEMs simplify_gen_subreg may generate an invalid new address
   because, e.g., the original address is considered mode-dependent
   by the target, which restricts simplify_subreg from invoking
   adjust_address_nv.  Instead of preparing fallback support for an
   invalid address, we call adjust_address_nv directly.  */
if (MEM_P (cplx)(((enum rtx_code) (cplx)->code) == MEM))
  {
    emit_move_insn (adjust_address_nv (cplx, imode,adjust_address_1 (cplx, imode, imag_p ? GET_MODE_SIZE (imode)
 : 0, 0, 1, 0, 0)
			 imag_p ? GET_MODE_SIZE (imode) : 0)adjust_address_1 (cplx, imode, imag_p ? GET_MODE_SIZE (imode)
 : 0, 0, 1, 0, 0),
      val);
    return;
  }

/* If the sub-object is at least word sized, then we know that subregging
   will work.  This special case is important, since store_bit_field
   wants to operate on integer modes, and there's rarely an OImode to
   correspond to TCmode.  */
if (ibitsize >= BITS_PER_WORD((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4))
    /* For hard regs we have exact predicates.  Assume we can split
the original object if it spans an even number of hard regs.
This special case is important for SCmode on 64-bit platforms
where the natural size of floating-point regs is 32-bit.  */
    || (REG_P (cplx)(((enum rtx_code) (cplx)->code) == REG)
 && REGNO (cplx)(rhs_regno(cplx)) < FIRST_PSEUDO_REGISTER76
 && REG_NREGS (cplx)((&(cplx)->u.reg)->nregs) % 2 == 0))
  {
    rtx part = simplify_gen_subreg (imode, cplx, cmode,
		      imag_p ? GET_MODE_SIZE (imode) : 0);
    if (part)
      {
 emit_move_insn (part, val);
 return;
}
    else
/* simplify_gen_subreg may fail for sub-word MEMs.  */
gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD)((void)(!((((enum rtx_code) (cplx)->code) == MEM) &&
 ibitsize < ((8) * (((global_options.x_ix86_isa_flags &
 (1UL << 1)) != 0) ? 8 : 4))) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3700, __FUNCTION__), 0 : 0));
  }

store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val,
   false, undefined_p);
3705}

3707/* Extract one of the components of the complex value CPLX.  Extract the
 real part if IMAG_P is false, and the imaginary part if it's true.  */

3710rtx
3711read_complex_part (rtx cplx, bool imag_p)
3712{
machine_mode cmode;
scalar_mode imode;
unsigned ibitsize;

if (GET_CODE (cplx)((enum rtx_code) (cplx)->code) == CONCAT)
  return XEXP (cplx, imag_p)(((cplx)->u.fld[imag_p]).rt_rtx);

cmode = GET_MODE (cplx)((machine_mode) (cplx)->mode);
imode = GET_MODE_INNER (cmode)(mode_to_inner (cmode));
ibitsize = GET_MODE_BITSIZE (imode);

/* Special case reads from complex constants that got spilled to memory.  */
if (MEM_P (cplx)(((enum rtx_code) (cplx)->code) == MEM) && GET_CODE (XEXP (cplx, 0))((enum rtx_code) ((((cplx)->u.fld[0]).rt_rtx))->code) == SYMBOL_REF)
  {
    tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0))((__extension__ ({ __typeof (((((cplx)->u.fld[0]).rt_rtx))
) const _rtx = (((((cplx)->u.fld[0]).rt_rtx))); if (((enum
 rtx_code) (_rtx)->code) != SYMBOL_REF) rtl_check_failed_flag
 ("CONSTANT_POOL_ADDRESS_P", _rtx, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3727, __FUNCTION__); _rtx; })->unchanging) ? nullptr : (
((((((cplx)->u.fld[0]).rt_rtx)))->u.fld[1]).rt_tree));
    if (decl && TREE_CODE (decl)((enum tree_code) (decl)->base.code) == COMPLEX_CST)
{
 tree part = imag_p ? TREE_IMAGPART (decl)((tree_check ((decl), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3730, __FUNCTION__, (COMPLEX_CST)))->complex.imag) : TREE_REALPART (decl)((tree_check ((decl), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3730, __FUNCTION__, (COMPLEX_CST)))->complex.real);
 if (CONSTANT_CLASS_P (part)(tree_code_type_tmpl <0>::tree_code_type[(int) (((enum tree_code
) (part)->base.code))] == tcc_constant))
   return expand_expr (part, NULL_RTX(rtx) 0, imode, EXPAND_NORMAL);
}
  }

/* For MEMs simplify_gen_subreg may generate an invalid new address
   because, e.g., the original address is considered mode-dependent
   by the target, which restricts simplify_subreg from invoking
   adjust_address_nv.  Instead of preparing fallback support for an
   invalid address, we call adjust_address_nv directly.  */
if (MEM_P (cplx)(((enum rtx_code) (cplx)->code) == MEM))
  return adjust_address_nv (cplx, imode,adjust_address_1 (cplx, imode, imag_p ? GET_MODE_SIZE (imode)
 : 0, 0, 1, 0, 0)
	      imag_p ? GET_MODE_SIZE (imode) : 0)adjust_address_1 (cplx, imode, imag_p ? GET_MODE_SIZE (imode)
 : 0, 0, 1, 0, 0);

/* If the sub-object is at least word sized, then we know that subregging
   will work.  This special case is important, since extract_bit_field
   wants to operate on integer modes, and there's rarely an OImode to
   correspond to TCmode.  */
if (ibitsize >= BITS_PER_WORD((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4))
    /* For hard regs we have exact predicates.  Assume we can split
the original object if it spans an even number of hard regs.
This special case is important for SCmode on 64-bit platforms
where the natural size of floating-point regs is 32-bit.  */
    || (REG_P (cplx)(((enum rtx_code) (cplx)->code) == REG)
 && REGNO (cplx)(rhs_regno(cplx)) < FIRST_PSEUDO_REGISTER76
 && REG_NREGS (cplx)((&(cplx)->u.reg)->nregs) % 2 == 0))
  {
    rtx ret = simplify_gen_subreg (imode, cplx, cmode,
		     imag_p ? GET_MODE_SIZE (imode) : 0);
    if (ret)
      return ret;
    else
/* simplify_gen_subreg may fail for sub-word MEMs.  */
gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD)((void)(!((((enum rtx_code) (cplx)->code) == MEM) &&
 ibitsize < ((8) * (((global_options.x_ix86_isa_flags &
 (1UL << 1)) != 0) ? 8 : 4))) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3764, __FUNCTION__), 0 : 0));
  }

return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
	    true, NULL_RTX(rtx) 0, imode, imode, false, NULLnullptr);
3769}
3770
3771/* A subroutine of emit_move_insn_1.  Yet another lowpart generator.
 NEW_MODE and OLD_MODE are the same size.  Return NULL if X cannot be
 represented in NEW_MODE.  If FORCE is true, this will never happen, as
 we'll force-create a SUBREG if needed.  */

3776static rtx
3777emit_move_change_mode (machine_mode new_mode,
       machine_mode old_mode, rtx x, bool force)
3779{
rtx ret;

if (push_operand (x, GET_MODE (x)((machine_mode) (x)->mode)))
  {
    ret = gen_rtx_MEM (new_mode, XEXP (x, 0)(((x)->u.fld[0]).rt_rtx));
    MEM_COPY_ATTRIBUTES (ret, x)((__extension__ ({ __typeof ((ret)) const _rtx = ((ret)); if (
((enum rtx_code) (_rtx)->code) != MEM && ((enum rtx_code
) (_rtx)->code) != ASM_OPERANDS && ((enum rtx_code
) (_rtx)->code) != ASM_INPUT) rtl_check_failed_flag ("MEM_VOLATILE_P"
, _rtx, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3785, __FUNCTION__); _rtx; })->volatil) = (__extension__
 ({ __typeof ((x)) const _rtx = ((x)); if (((enum rtx_code) (
_rtx)->code) != MEM && ((enum rtx_code) (_rtx)->
code) != ASM_OPERANDS && ((enum rtx_code) (_rtx)->
code) != ASM_INPUT) rtl_check_failed_flag ("MEM_VOLATILE_P", _rtx
, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3785, __FUNCTION__); _rtx; })->volatil), (__extension__ (
{ __typeof ((ret)) const _rtx = ((ret)); if (((enum rtx_code)
 (_rtx)->code) != MEM) rtl_check_failed_flag ("MEM_NOTRAP_P"
, _rtx, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3785, __FUNCTION__); _rtx; })->call) = (__extension__ ({
 __typeof ((x)) const _rtx = ((x)); if (((enum rtx_code) (_rtx
)->code) != MEM) rtl_check_failed_flag ("MEM_NOTRAP_P", _rtx
, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3785, __FUNCTION__); _rtx; })->call), (__extension__ ({ __typeof
 ((ret)) const _rtx = ((ret)); if (((enum rtx_code) (_rtx)->
code) != MEM) rtl_check_failed_flag ("MEM_READONLY_P", _rtx, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3785, __FUNCTION__); _rtx; })->unchanging) = (__extension__
 ({ __typeof ((x)) const _rtx = ((x)); if (((enum rtx_code) (
_rtx)->code) != MEM) rtl_check_failed_flag ("MEM_READONLY_P"
, _rtx, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3785, __FUNCTION__); _rtx; })->unchanging), (__extension__
 ({ __typeof ((ret)) const _rtx = ((ret)); if (((enum rtx_code
) (_rtx)->code) != MEM) rtl_check_failed_flag ("MEM_KEEP_ALIAS_SET_P"
, _rtx, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3785, __FUNCTION__); _rtx; })->jump) = (__extension__ ({
 __typeof ((x)) const _rtx = ((x)); if (((enum rtx_code) (_rtx
)->code) != MEM) rtl_check_failed_flag ("MEM_KEEP_ALIAS_SET_P"
, _rtx, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3785, __FUNCTION__); _rtx; })->jump), (__extension__ ({ __typeof
 ((ret)) const _rtx = ((ret)); if (((enum rtx_code) (_rtx)->
code) != MEM) rtl_check_failed_flag ("MEM_POINTER", _rtx, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3785, __FUNCTION__); _rtx; })->frame_related) = (__extension__
 ({ __typeof ((x)) const _rtx = ((x)); if (((enum rtx_code) (
_rtx)->code) != MEM) rtl_check_failed_flag ("MEM_POINTER",
 _rtx, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3785, __FUNCTION__); _rtx; })->frame_related), (((ret)->
u.fld[1]).rt_mem) = (((x)->u.fld[1]).rt_mem));
  }
else if (MEM_P (x)(((enum rtx_code) (x)->code) == MEM))
  {
    /* We don't have to worry about changing the address since the
size in bytes is supposed to be the same.  */
    if (reload_in_progress)
{
 /* Copy the MEM to change the mode and move any
    substitutions from the old MEM to the new one.  */
 ret = adjust_address_nv (x, new_mode, 0)adjust_address_1 (x, new_mode, 0, 0, 1, 0, 0);
 copy_replacements (x, ret);
}
    else
ret = adjust_address (x, new_mode, 0)adjust_address_1 (x, new_mode, 0, 1, 1, 0, 0);
  }
else
  {
    /* Note that we do want simplify_subreg's behavior of validating
that the new mode is ok for a hard register.  If we were to use
simplify_gen_subreg, we would create the subreg, but would
probably run into the target not being able to implement it.  */
    /* Except, of course, when FORCE is true, when this is exactly what
we want.  Which is needed for CCmodes on some targets.  */
    if (force)
ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
    else
ret = simplify_subreg (new_mode, x, old_mode, 0);
  }

return ret;
3816}

3818/* A subroutine of emit_move_insn_1.  Generate a move from Y into X using
 an integer mode of the same size as MODE.  Returns the instruction
 emitted, or NULL if such a move could not be generated.  */

3822static rtx_insn *
3823emit_move_via_integer (machine_mode mode, rtx x, rtx y, bool force)
3824{
scalar_int_mode imode;
enum insn_code code;

/* There must exist a mode of the exact size we require.  */
if (!int_mode_for_mode (mode).exists (&imode))
  return NULLnullptr;

/* The target must support moves in this mode.  */
code = optab_handler (mov_optab, imode);
if (code == CODE_FOR_nothing)
  return NULLnullptr;

x = emit_move_change_mode (imode, mode, x, force);
if (x == NULL_RTX(rtx) 0)
  return NULLnullptr;
y = emit_move_change_mode (imode, mode, y, force);
if (y == NULL_RTX(rtx) 0)
  return NULLnullptr;
return emit_insn (GEN_FCN (code)(insn_data[code].genfun) (x, y));
3844}

3846/* A subroutine of emit_move_insn_1.  X is a push_operand in MODE.
 Return an equivalent MEM that does not use an auto-increment.  */

3849rtx
3850emit_move_resolve_push (machine_mode mode, rtx x)
3851{
enum rtx_code code = GET_CODE (XEXP (x, 0))((enum rtx_code) ((((x)->u.fld[0]).rt_rtx))->code);
rtx temp;

poly_int64 adjust = GET_MODE_SIZE (mode);
3856#ifdef PUSH_ROUNDING
adjust = PUSH_ROUNDING (adjust)ix86_push_rounding (adjust);
3858#endif
if (code == PRE_DEC || code == POST_DEC)
  adjust = -adjust;
else if (code == PRE_MODIFY || code == POST_MODIFY)
  {
    rtx expr = XEXP (XEXP (x, 0), 1)((((((x)->u.fld[0]).rt_rtx))->u.fld[1]).rt_rtx);

    gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS)((void)(!(((enum rtx_code) (expr)->code) == PLUS || ((enum
 rtx_code) (expr)->code) == MINUS) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3865, __FUNCTION__), 0 : 0));
    poly_int64 val = rtx_to_poly_int64 (XEXP (expr, 1)(((expr)->u.fld[1]).rt_rtx));
    if (GET_CODE (expr)((enum rtx_code) (expr)->code) == MINUS)
val = -val;
    gcc_assert (known_eq (adjust, val) || known_eq (adjust, -val))((void)(!((!maybe_ne (adjust, val)) || (!maybe_ne (adjust, -val
))) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3869, __FUNCTION__), 0 : 0));
    adjust = val;
  }

/* Do not use anti_adjust_stack, since we don't want to update
   stack_pointer_delta.  */
temp = expand_simple_binop (Pmode(global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode (
(scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode))), PLUS, stack_pointer_rtx((this_target_rtl->x_global_rtl)[GR_STACK_POINTER]),
	      gen_int_mode (adjust, Pmode(global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode (
(scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode)))), stack_pointer_rtx((this_target_rtl->x_global_rtl)[GR_STACK_POINTER]),
	      0, OPTAB_LIB_WIDEN);
if (temp != stack_pointer_rtx((this_target_rtl->x_global_rtl)[GR_STACK_POINTER]))
  emit_move_insn (stack_pointer_rtx((this_target_rtl->x_global_rtl)[GR_STACK_POINTER]), temp);

switch (code)
  {
  case PRE_INC:
  case PRE_DEC:
  case PRE_MODIFY:
    temp = stack_pointer_rtx((this_target_rtl->x_global_rtl)[GR_STACK_POINTER]);
    break;
  case POST_INC:
  case POST_DEC:
  case POST_MODIFY:
    temp = plus_constant (Pmode(global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode (
(scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode))), stack_pointer_rtx((this_target_rtl->x_global_rtl)[GR_STACK_POINTER]), -adjust);
    break;
  default:
    gcc_unreachable ()(fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3894, __FUNCTION__));
  }

return replace_equiv_address (x, temp);
3898}

3900/* A subroutine of emit_move_complex.  Generate a move from Y into X.
 X is known to satisfy push_operand, and MODE is known to be complex.
 Returns the last instruction emitted.  */

3904rtx_insn *
3905emit_move_complex_push (machine_mode mode, rtx x, rtx y)
3906{
scalar_mode submode = GET_MODE_INNER (mode)(mode_to_inner (mode));
bool imag_first;

3910#ifdef PUSH_ROUNDING
poly_int64 submodesize = GET_MODE_SIZE (submode);

/* In case we output to the stack, but the size is smaller than the
   machine can push exactly, we need to use move instructions.  */
if (maybe_ne (PUSH_ROUNDING (submodesize)ix86_push_rounding (submodesize), submodesize))
  {
    x = emit_move_resolve_push (mode, x);
    return emit_move_insn (x, y);
  }
3920#endif

/* Note that the real part always precedes the imag part in memory
   regardless of machine's endianness.  */
switch (GET_CODE (XEXP (x, 0))((enum rtx_code) ((((x)->u.fld[0]).rt_rtx))->code))
  {
  case PRE_DEC:
  case POST_DEC:
    imag_first = true;
    break;
  case PRE_INC:
  case POST_INC:
    imag_first = false;
    break;
  default:
    gcc_unreachable ()(fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 3935, __FUNCTION__));
  }

emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)(((x)->u.fld[0]).rt_rtx)),
  read_complex_part (y, imag_first));
return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)(((x)->u.fld[0]).rt_rtx)),
	 read_complex_part (y, !imag_first));
3942}

3944/* A subroutine of emit_move_complex.  Perform the move from Y to X
 via two moves of the parts.  Returns the last instruction emitted.  */

3947rtx_insn *
3948emit_move_complex_parts (rtx x, rtx y)
3949{
/* Show the output dies here.  This is necessary for SUBREGs
   of pseudos since we cannot track their lifetimes correctly;
   hard regs shouldn't appear here except as return values.  */
if (!reload_completed && !reload_in_progress
    && REG_P (x)(((enum rtx_code) (x)->code) == REG) && !reg_overlap_mentioned_p (x, y))
  emit_clobber (x);

write_complex_part (x, read_complex_part (y, false), false, true);
write_complex_part (x, read_complex_part (y, true), true, false);

return get_last_insn ();
3961}

3963/* A subroutine of emit_move_insn_1.  Generate a move from Y into X.
 MODE is known to be complex.  Returns the last instruction emitted.  */

3966static rtx_insn *
3967emit_move_complex (machine_mode mode, rtx x, rtx y)
3968{
bool try_int;

/* Need to take special care for pushes, to maintain proper ordering
   of the data, and possibly extra padding.  */
if (push_operand (x, mode))
  return emit_move_complex_push (mode, x, y);

/* See if we can coerce the target into moving both values at once, except
   for floating point where we favor moving as parts if this is easy.  */
if (GET_MODE_CLASS (mode)((enum mode_class) mode_class[mode]) == MODE_COMPLEX_FLOAT
    && optab_handler (mov_optab, GET_MODE_INNER (mode)(mode_to_inner (mode))) != CODE_FOR_nothing
    && !(REG_P (x)(((enum rtx_code) (x)->code) == REG)
  && HARD_REGISTER_P (x)((((rhs_regno(x))) < 76))
  && REG_NREGS (x)((&(x)->u.reg)->nregs) == 1)
    && !(REG_P (y)(((enum rtx_code) (y)->code) == REG)
  && HARD_REGISTER_P (y)((((rhs_regno(y))) < 76))
  && REG_NREGS (y)((&(y)->u.reg)->nregs) == 1))
  try_int = false;
/* Not possible if the values are inherently not adjacent.  */
else if (GET_CODE (x)((enum rtx_code) (x)->code) == CONCAT || GET_CODE (y)((enum rtx_code) (y)->code) == CONCAT)
  try_int = false;
/* Is possible if both are registers (or subregs of registers).  */
else if (register_operand (x, mode) && register_operand (y, mode))
  try_int = true;
/* If one of the operands is a memory, and alignment constraints
   are friendly enough, we may be able to do combined memory operations.
   We do not attempt this if Y is a constant because that combination is
   usually better with the by-parts thing below.  */
else if ((MEM_P (x)(((enum rtx_code) (x)->code) == MEM) ? !CONSTANT_P (y)((rtx_class[(int) (((enum rtx_code) (y)->code))]) == RTX_CONST_OBJ
) : MEM_P (y)(((enum rtx_code) (y)->code) == MEM))
  && (!STRICT_ALIGNMENT0
      || get_mode_alignment (mode) == BIGGEST_ALIGNMENT(((global_options.x_target_flags & (1U << 12)) != 0
) ? 32 : (((global_options.x_ix86_isa_flags & (1UL <<
 15)) != 0) ? 512 : (((global_options.x_ix86_isa_flags & (
1UL << 8)) != 0) ? 256 : 128)))))
  try_int = true;
else
  try_int = false;

if (try_int)
  {
    rtx_insn *ret;

    /* For memory to memory moves, optimal behavior can be had with the
existing block move logic.  But use normal expansion if optimizing
for size.  */
    if (MEM_P (x)(((enum rtx_code) (x)->code) == MEM) && MEM_P (y)(((enum rtx_code) (y)->code) == MEM))
{
 emit_block_move (x, y, gen_int_mode (GET_MODE_SIZE (mode), Pmode(global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode (
(scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode)))),
	   (optimize_insn_for_speed_p()
	    ? BLOCK_OP_NO_LIBCALL : BLOCK_OP_NORMAL));
 return get_last_insn ();
}

    ret = emit_move_via_integer (mode, x, y, true);
    if (ret)
return ret;
  }

return emit_move_complex_parts (x, y);
4025}

4027/* A subroutine of emit_move_insn_1.  Generate a move from Y into X.
 MODE is known to be MODE_CC.  Returns the last instruction emitted.  */

4030static rtx_insn *
4031emit_move_ccmode (machine_mode mode, rtx x, rtx y)
4032{
rtx_insn *ret;

/* Assume all MODE_CC modes are equivalent; if we have movcc, use it.  */
if (mode != CCmode((void) 0, E_CCmode))
  {
    enum insn_code code = optab_handler (mov_optab, CCmode((void) 0, E_CCmode));
    if (code != CODE_FOR_nothing)
{
 x = emit_move_change_mode (CCmode((void) 0, E_CCmode), mode, x, true);
 y = emit_move_change_mode (CCmode((void) 0, E_CCmode), mode, y, true);
 return emit_insn (GEN_FCN (code)(insn_data[code].genfun) (x, y));
}
  }

/* Otherwise, find the MODE_INT mode of the same width.  */
ret = emit_move_via_integer (mode, x, y, false);
gcc_assert (ret != NULL)((void)(!(ret != nullptr) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 4049, __FUNCTION__), 0 : 0));
return ret;
4051}

4053/* Return true if word I of OP lies entirely in the
 undefined bits of a paradoxical subreg.  */

4056static bool
4057undefined_operand_subword_p (const_rtx op, int i)
4058{
if (GET_CODE (op)((enum rtx_code) (op)->code) != SUBREG)
  return false;
machine_mode innermostmode = GET_MODE (SUBREG_REG (op))((machine_mode) ((((op)->u.fld[0]).rt_rtx))->mode);
poly_int64 offset = i * UNITS_PER_WORD(((global_options.x_ix86_isa_flags & (1UL << 1)) !=
 0) ? 8 : 4) + subreg_memory_offset (op);
return (known_ge (offset, GET_MODE_SIZE (innermostmode))(!maybe_lt (offset, GET_MODE_SIZE (innermostmode)))
 || known_le (offset, -UNITS_PER_WORD)(!maybe_lt (-(((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4), offset)));
4065}

4067/* A subroutine of emit_move_insn_1.  Generate a move from Y into X.
 MODE is any multi-word or full-word mode that lacks a move_insn
 pattern.  Note that you will get better code if you define such
 patterns, even if they must turn into multiple assembler instructions.  */

4072static rtx_insn *
4073emit_move_multi_word (machine_mode mode, rtx x, rtx y)
4074{
rtx_insn *last_insn = 0;
rtx_insn *seq;
rtx inner;
bool need_clobber;
int i, mode_size;

/* This function can only handle cases where the number of words is
   known at compile time.  */
mode_size = GET_MODE_SIZE (mode).to_constant ();
gcc_assert (mode_size >= UNITS_PER_WORD)((void)(!(mode_size >= (((global_options.x_ix86_isa_flags &
 (1UL << 1)) != 0) ? 8 : 4)) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 4084, __FUNCTION__), 0 : 0));

/* If X is a push on the stack, do the push now and replace
   X with a reference to the stack pointer.  */
if (push_operand (x, mode))
  x = emit_move_resolve_push (mode, x);

/* If we are in reload, see if either operand is a MEM whose address
   is scheduled for replacement.  */
if (reload_in_progress && MEM_P (x)(((enum rtx_code) (x)->code) == MEM)
    && (inner = find_replacement (&XEXP (x, 0)(((x)->u.fld[0]).rt_rtx))) != XEXP (x, 0)(((x)->u.fld[0]).rt_rtx))
  x = replace_equiv_address_nv (x, inner);
if (reload_in_progress && MEM_P (y)(((enum rtx_code) (y)->code) == MEM)
    && (inner = find_replacement (&XEXP (y, 0)(((y)->u.fld[0]).rt_rtx))) != XEXP (y, 0)(((y)->u.fld[0]).rt_rtx))
  y = replace_equiv_address_nv (y, inner);

start_sequence ();

need_clobber = false;
for (i = 0; i < CEIL (mode_size, UNITS_PER_WORD)(((mode_size) + ((((global_options.x_ix86_isa_flags & (1UL
 << 1)) != 0) ? 8 : 4)) - 1) / ((((global_options.x_ix86_isa_flags
 & (1UL << 1)) != 0) ? 8 : 4))); i++)
  {
    /* Do not generate code for a move if it would go entirely
to the non-existing bits of a paradoxical subreg.  */
    if (undefined_operand_subword_p (x, i))
continue;

    rtx xpart = operand_subword (x, i, 1, mode);
    rtx ypart;

    /* Do not generate code for a move if it would come entirely
from the undefined bits of a paradoxical subreg.  */
    if (undefined_operand_subword_p (y, i))
continue;

    ypart = operand_subword (y, i, 1, mode);

    /* If we can't get a part of Y, put Y into memory if it is a
constant.  Otherwise, force it into a register.  Then we must
be able to get a part of Y.  */
    if (ypart == 0 && CONSTANT_P (y)((rtx_class[(int) (((enum rtx_code) (y)->code))]) == RTX_CONST_OBJ
))
{
 y = use_anchored_address (force_const_mem (mode, y));
 ypart = operand_subword (y, i, 1, mode);
}
    else if (ypart == 0)
ypart = operand_subword_force (y, i, mode);

    gcc_assert (xpart && ypart)((void)(!(xpart && ypart) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 4131, __FUNCTION__), 0 : 0));

    need_clobber |= (GET_CODE (xpart)((enum rtx_code) (xpart)->code) == SUBREG);

    last_insn = emit_move_insn (xpart, ypart);
  }

seq = get_insns ();
end_sequence ();

/* Show the output dies here.  This is necessary for SUBREGs
   of pseudos since we cannot track their lifetimes correctly;
   hard regs shouldn't appear here except as return values.
   We never want to emit such a clobber after reload.  */
if (x != y
    && ! (reload_in_progress || reload_completed)
    && need_clobber != 0)
  emit_clobber (x);

emit_insn (seq);

return last_insn;
4153}

4155/* Low level part of emit_move_insn.
 Called just like emit_move_insn, but assumes X and Y
 are basically valid.  */

4159rtx_insn *
4160emit_move_insn_1 (rtx x, rtx y)
4161{
machine_mode mode = GET_MODE (x)((machine_mode) (x)->mode);
enum insn_code code;

gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE)((void)(!((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE
) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 4165, __FUNCTION__), 0 : 0));

code = optab_handler (mov_optab, mode);
if (code != CODE_FOR_nothing)
  return emit_insn (GEN_FCN (code)(insn_data[code].genfun) (x, y));

/* Expand complex moves by moving real part and imag part.  */
if (COMPLEX_MODE_P (mode)(((enum mode_class) mode_class[mode]) == MODE_COMPLEX_INT || (
(enum mode_class) mode_class[mode]) == MODE_COMPLEX_FLOAT))
  return emit_move_complex (mode, x, y);

if (GET_MODE_CLASS (mode)((enum mode_class) mode_class[mode]) == MODE_DECIMAL_FLOAT
    || ALL_FIXED_POINT_MODE_P (mode)(((((enum mode_class) mode_class[mode]) == MODE_FRACT || ((enum
 mode_class) mode_class[mode]) == MODE_VECTOR_FRACT) || (((enum
 mode_class) mode_class[mode]) == MODE_ACCUM || ((enum mode_class
) mode_class[mode]) == MODE_VECTOR_ACCUM)) || ((((enum mode_class
) mode_class[mode]) == MODE_UFRACT || ((enum mode_class) mode_class
[mode]) == MODE_VECTOR_UFRACT) || (((enum mode_class) mode_class
[mode]) == MODE_UACCUM || ((enum mode_class) mode_class[mode]
) == MODE_VECTOR_UACCUM))))
  {
    rtx_insn *result = emit_move_via_integer (mode, x, y, true);

    /* If we can't find an integer mode, use multi words.  */
    if (result)
return result;
    else
return emit_move_multi_word (mode, x, y);
  }

if (GET_MODE_CLASS (mode)((enum mode_class) mode_class[mode]) == MODE_CC)
  return emit_move_ccmode (mode, x, y);

/* Try using a move pattern for the corresponding integer mode.  This is
   only safe when simplify_subreg can convert MODE constants into integer
   constants.  At present, it can only do this reliably if the value
   fits within a HOST_WIDE_INT.  */
if (!CONSTANT_P (y)((rtx_class[(int) (((enum rtx_code) (y)->code))]) == RTX_CONST_OBJ
)
    || known_le (GET_MODE_BITSIZE (mode), HOST_BITS_PER_WIDE_INT)(!maybe_lt (64, GET_MODE_BITSIZE (mode))))
  {
    rtx_insn *ret = emit_move_via_integer (mode, x, y, lra_in_progress);

    if (ret)
{
 if (! lra_in_progress || recog (PATTERN (ret), ret, 0) >= 0)
   return ret;
}
  }

return emit_move_multi_word (mode, x, y);
4207}

4209/* Generate code to copy Y into X.
 Both Y and X must have the same mode, except that
 Y can be a constant with VOIDmode.
 This mode cannot be BLKmode; use emit_block_move for that.

 Return the last instruction emitted.  */

4216rtx_insn *
4217emit_move_insn (rtx x, rtx y)
4218{
machine_mode mode = GET_MODE (x)((machine_mode) (x)->mode);
rtx y_cst = NULL_RTX(rtx) 0;
rtx_insn *last_insn;
rtx set;

gcc_assert (mode != BLKmode((void)(!(mode != ((void) 0, E_BLKmode) && (((machine_mode
) (y)->mode) == mode || ((machine_mode) (y)->mode) == (
(void) 0, E_VOIDmode))) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 4225, __FUNCTION__), 0 : 0))
     && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode))((void)(!(mode != ((void) 0, E_BLKmode) && (((machine_mode
) (y)->mode) == mode || ((machine_mode) (y)->mode) == (
(void) 0, E_VOIDmode))) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 4225, __FUNCTION__), 0 : 0));

/* If we have a copy that looks like one of the following patterns:
     (set (subreg:M1 (reg:M2 ...)) (subreg:M1 (reg:M2 ...)))
     (set (subreg:M1 (reg:M2 ...)) (mem:M1 ADDR))
     (set (mem:M1 ADDR) (subreg:M1 (reg:M2 ...)))
     (set (subreg:M1 (reg:M2 ...)) (constant C))
   where mode M1 is equal in size to M2, try to detect whether the
   mode change involves an implicit round trip through memory.
   If so, see if we can avoid that by removing the subregs and
   doing the move in mode M2 instead.  */

rtx x_inner = NULL_RTX(rtx) 0;
rtx y_inner = NULL_RTX(rtx) 0;

auto candidate_subreg_p = [&](rtx subreg) {
  return (REG_P (SUBREG_REG (subreg))(((enum rtx_code) ((((subreg)->u.fld[0]).rt_rtx))->code
) == REG)
   && known_eq (GET_MODE_SIZE (GET_MODE (SUBREG_REG (subreg))),(!maybe_ne (GET_MODE_SIZE (((machine_mode) ((((subreg)->u.
fld[0]).rt_rtx))->mode)), GET_MODE_SIZE (((machine_mode) (
subreg)->mode))))
	 GET_MODE_SIZE (GET_MODE (subreg)))(!maybe_ne (GET_MODE_SIZE (((machine_mode) ((((subreg)->u.
fld[0]).rt_rtx))->mode)), GET_MODE_SIZE (((machine_mode) (
subreg)->mode))))
   && optab_handler (mov_optab, GET_MODE (SUBREG_REG (subreg))((machine_mode) ((((subreg)->u.fld[0]).rt_rtx))->mode))
      != CODE_FOR_nothing);
};

auto candidate_mem_p = [&](machine_mode innermode, rtx mem) {
  return (!targetm.can_change_mode_class (innermode, GET_MODE (mem)((machine_mode) (mem)->mode), ALL_REGS)
   && !push_operand (mem, GET_MODE (mem)((machine_mode) (mem)->mode))
   /* Not a candiate if innermode requires too much alignment.  */
   && (MEM_ALIGN (mem)(get_mem_attrs (mem)->align) >= GET_MODE_ALIGNMENT (innermode)get_mode_alignment (innermode)
|| targetm.slow_unaligned_access (GET_MODE (mem)((machine_mode) (mem)->mode),
				  MEM_ALIGN (mem)(get_mem_attrs (mem)->align))
|| !targetm.slow_unaligned_access (innermode,
				   MEM_ALIGN (mem)(get_mem_attrs (mem)->align))));
};

if (SUBREG_P (x)(((enum rtx_code) (x)->code) == SUBREG) && candidate_subreg_p (x))
  x_inner = SUBREG_REG (x)(((x)->u.fld[0]).rt_rtx);

if (SUBREG_P (y)(((enum rtx_code) (y)->code) == SUBREG) && candidate_subreg_p (y))
  y_inner = SUBREG_REG (y)(((y)->u.fld[0]).rt_rtx);

if (x_inner != NULL_RTX(rtx) 0
    && y_inner != NULL_RTX(rtx) 0
    && GET_MODE (x_inner)((machine_mode) (x_inner)->mode) == GET_MODE (y_inner)((machine_mode) (y_inner)->mode)
    && !targetm.can_change_mode_class (GET_MODE (x_inner)((machine_mode) (x_inner)->mode), mode, ALL_REGS))
  {
    x = x_inner;
    y = y_inner;
    mode = GET_MODE (x_inner)((machine_mode) (x_inner)->mode);
  }
else if (x_inner != NULL_RTX(rtx) 0
  && MEM_P (y)(((enum rtx_code) (y)->code) == MEM)
  && candidate_mem_p (GET_MODE (x_inner)((machine_mode) (x_inner)->mode), y))
  {
    x = x_inner;
    y = adjust_address (y, GET_MODE (x_inner), 0)adjust_address_1 (y, ((machine_mode) (x_inner)->mode), 0, 1
, 1, 0, 0);
    mode = GET_MODE (x_inner)((machine_mode) (x_inner)->mode);
  }
else if (y_inner != NULL_RTX(rtx) 0
  && MEM_P (x)(((enum rtx_code) (x)->code) == MEM)
  && candidate_mem_p (GET_MODE (y_inner)((machine_mode) (y_inner)->mode), x))
  {
    x = adjust_address (x, GET_MODE (y_inner), 0)adjust_address_1 (x, ((machine_mode) (y_inner)->mode), 0, 1
, 1, 0, 0);
    y = y_inner;
    mode = GET_MODE (y_inner)((machine_mode) (y_inner)->mode);
  }
else if (x_inner != NULL_RTX(rtx) 0
  && CONSTANT_P (y)((rtx_class[(int) (((enum rtx_code) (y)->code))]) == RTX_CONST_OBJ
)
  && !targetm.can_change_mode_class (GET_MODE (x_inner)((machine_mode) (x_inner)->mode),
			      mode, ALL_REGS)
  && (y_inner = simplify_subreg (GET_MODE (x_inner)((machine_mode) (x_inner)->mode), y, mode, 0)))
  {
    x = x_inner;
    y = y_inner;
    mode = GET_MODE (x_inner)((machine_mode) (x_inner)->mode);
  }

if (CONSTANT_P (y)((rtx_class[(int) (((enum rtx_code) (y)->code))]) == RTX_CONST_OBJ
))
  {
    if (optimizeglobal_options.x_optimize
 && SCALAR_FLOAT_MODE_P (GET_MODE (x))(((enum mode_class) mode_class[((machine_mode) (x)->mode)]
) == MODE_FLOAT || ((enum mode_class) mode_class[((machine_mode
) (x)->mode)]) == MODE_DECIMAL_FLOAT)
 && (last_insn = compress_float_constant (x, y)))
return last_insn;

    y_cst = y;

    if (!targetm.legitimate_constant_p (mode, y))
{
 y = force_const_mem (mode, y);

 /* If the target's cannot_force_const_mem prevented the spill,
    assume that the target's move expanders will also take care
    of the non-legitimate constant.  */
 if (!y)
   y = y_cst;
 else
   y = use_anchored_address (y);
}
  }

/* If X or Y are memory references, verify that their addresses are valid
   for the machine.  */
if (MEM_P (x)(((enum rtx_code) (x)->code) == MEM)
    && (! memory_address_addr_space_p (GET_MODE (x)((machine_mode) (x)->mode), XEXP (x, 0)(((x)->u.fld[0]).rt_rtx),
			 MEM_ADDR_SPACE (x)(get_mem_attrs (x)->addrspace))
 && ! push_operand (x, GET_MODE (x)((machine_mode) (x)->mode))))
  x = validize_mem (x);

if (MEM_P (y)(((enum rtx_code) (y)->code) == MEM)
    && ! memory_address_addr_space_p (GET_MODE (y)((machine_mode) (y)->mode), XEXP (y, 0)(((y)->u.fld[0]).rt_rtx),
			MEM_ADDR_SPACE (y)(get_mem_attrs (y)->addrspace)))
  y = validize_mem (y);

gcc_assert (mode != BLKmode)((void)(!(mode != ((void) 0, E_BLKmode)) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 4337, __FUNCTION__), 0 : 0));

last_insn = emit_move_insn_1 (x, y);

if (y_cst && REG_P (x)(((enum rtx_code) (x)->code) == REG)
    && (set = single_set (last_insn)) != NULL_RTX(rtx) 0
    && SET_DEST (set)(((set)->u.fld[0]).rt_rtx) == x
    && ! rtx_equal_p (y_cst, SET_SRC (set)(((set)->u.fld[1]).rt_rtx)))
  set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));

return last_insn;
4348}

4350/* Generate the body of an instruction to copy Y into X.
 It may be a list of insns, if one insn isn't enough.  */

4353rtx_insn *
4354gen_move_insn (rtx x, rtx y)
4355{
rtx_insn *seq;

start_sequence ();
emit_move_insn_1 (x, y);
seq = get_insns ();
end_sequence ();
return seq;
4363}

4365/* If Y is representable exactly in a narrower mode, and the target can
 perform the extension directly from constant or memory, then emit the
 move as an extension.  */

4369static rtx_insn *
4370compress_float_constant (rtx x, rtx y)
4371{
machine_mode dstmode = GET_MODE (x)((machine_mode) (x)->mode);
machine_mode orig_srcmode = GET_MODE (y)((machine_mode) (y)->mode);
machine_mode srcmode;
const REAL_VALUE_TYPEstruct real_value *r;
int oldcost, newcost;
bool speed = optimize_insn_for_speed_p ();

r = CONST_DOUBLE_REAL_VALUE (y)((const struct real_value *) (&(y)->u.rv));

if (targetm.legitimate_constant_p (dstmode, y))
  oldcost = set_src_cost (y, orig_srcmode, speed);
else
  oldcost = set_src_cost (force_const_mem (dstmode, y), dstmode, speed);

FOR_EACH_MODE_UNTIL (srcmode, orig_srcmode)for ((srcmode) = (get_narrowest_mode (orig_srcmode)); (srcmode
) != (orig_srcmode); mode_iterator::get_known_next (&(srcmode
)))
  {
    enum insn_code ic;
    rtx trunc_y;
    rtx_insn *last_insn;

    /* Skip if the target can't extend this way.  */
    ic = can_extend_p (dstmode, srcmode, 0);
    if (ic == CODE_FOR_nothing)
continue;

    /* Skip if the narrowed value isn't exact.  */
    if (! exact_real_truncate (srcmode, r))
continue;

    trunc_y = const_double_from_real_value (*r, srcmode);

    if (targetm.legitimate_constant_p (srcmode, trunc_y))
{
 /* Skip if the target needs extra instructions to perform
    the extension.  */
 if (!insn_operand_matches (ic, 1, trunc_y))
   continue;
 /* This is valid, but may not be cheaper than the original. */
 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y)gen_rtx_fmt_e_stat ((FLOAT_EXTEND), ((dstmode)), ((trunc_y)) ),
		  dstmode, speed);
 if (oldcost < newcost)
   continue;
}
    else if (float_extend_from_mem(this_target_regs->x_float_extend_from_mem)[dstmode][srcmode])
{
 trunc_y = force_const_mem (srcmode, trunc_y);
 /* This is valid, but may not be cheaper than the original. */
 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y)gen_rtx_fmt_e_stat ((FLOAT_EXTEND), ((dstmode)), ((trunc_y)) ),
		  dstmode, speed);
 if (oldcost < newcost)
   continue;
 trunc_y = validize_mem (trunc_y);
}
    else
continue;

    /* For CSE's benefit, force the compressed constant pool entry
into a new pseudo.  This constant may be used in different modes,
and if not, combine will put things back together for us.  */
    trunc_y = force_reg (srcmode, trunc_y);

    /* If x is a hard register, perform the extension into a pseudo,
so that e.g. stack realignment code is aware of it.  */
    rtx target = x;
    if (REG_P (x)(((enum rtx_code) (x)->code) == REG) && HARD_REGISTER_P (x)((((rhs_regno(x))) < 76)))
target = gen_reg_rtx (dstmode);

    emit_unop_insn (ic, target, trunc_y, UNKNOWN);
    last_insn = get_last_insn ();

    if (REG_P (target)(((enum rtx_code) (target)->code) == REG))
set_unique_reg_note (last_insn, REG_EQUAL, y);

    if (target != x)
return emit_move_insn (x, target);
    return last_insn;
  }

return NULLnullptr;
4451}
4452
4453/* Pushing data onto the stack.  */

4455/* Push a block of length SIZE (perhaps variable)
 and return an rtx to address the beginning of the block.
 The value may be virtual_outgoing_args_rtx.

 EXTRA is the number of bytes of padding to push in addition to SIZE.
 BELOW nonzero means this padding comes at low addresses;
 otherwise, the padding comes at high addresses.  */

4463rtx
4464push_block (rtx size, poly_int64 extra, int below)
4465{
rtx temp;

size = convert_modes (Pmode(global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode (
(scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode))), ptr_mode, size, 1);
if (CONSTANT_P (size)((rtx_class[(int) (((enum rtx_code) (size)->code))]) == RTX_CONST_OBJ
))
  anti_adjust_stack (plus_constant (Pmode(global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode (
(scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode))), size, extra));
else if (REG_P (size)(((enum rtx_code) (size)->code) == REG) && known_eq (extra, 0)(!maybe_ne (extra, 0)))
  anti_adjust_stack (size);
else
  {
    temp = copy_to_mode_reg (Pmode(global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode (
(scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode))), size);
    if (maybe_ne (extra, 0))
temp = expand_binop (Pmode(global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode (
(scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode))), add_optab, temp,
	     gen_int_mode (extra, Pmode(global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode (
(scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode)))),
	     temp, 0, OPTAB_LIB_WIDEN);
    anti_adjust_stack (temp);
  }

if (STACK_GROWS_DOWNWARD1)
  {
    temp = virtual_outgoing_args_rtx((this_target_rtl->x_global_rtl)[GR_VIRTUAL_OUTGOING_ARGS]
);
    if (maybe_ne (extra, 0) && below)
temp = plus_constant (Pmode(global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode (
(scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode))), temp, extra);
  }
else
  {
    poly_int64 csize;
    if (poly_int_rtx_p (size, &csize))
temp = plus_constant (Pmode(global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode (
(scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode))), virtual_outgoing_args_rtx((this_target_rtl->x_global_rtl)[GR_VIRTUAL_OUTGOING_ARGS]
),
	      -csize - (below ? 0 : extra));
    else if (maybe_ne (extra, 0) && !below)
temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,gen_rtx_fmt_ee_stat ((PLUS), (((global_options.x_ix86_pmode ==
 PMODE_DI ? (scalar_int_mode ((scalar_int_mode::from_int) E_DImode
)) : (scalar_int_mode ((scalar_int_mode::from_int) E_SImode))
))), ((((this_target_rtl->x_global_rtl)[GR_VIRTUAL_OUTGOING_ARGS
]))), ((negate_rtx ((global_options.x_ix86_pmode == PMODE_DI ?
 (scalar_int_mode ((scalar_int_mode::from_int) E_DImode)) : (
scalar_int_mode ((scalar_int_mode::from_int) E_SImode))), plus_constant
 ((global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode
 ((scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode (
(scalar_int_mode::from_int) E_SImode))), size, extra)))) )
	     negate_rtx (Pmode, plus_constant (Pmode, size,gen_rtx_fmt_ee_stat ((PLUS), (((global_options.x_ix86_pmode ==
 PMODE_DI ? (scalar_int_mode ((scalar_int_mode::from_int) E_DImode
)) : (scalar_int_mode ((scalar_int_mode::from_int) E_SImode))
))), ((((this_target_rtl->x_global_rtl)[GR_VIRTUAL_OUTGOING_ARGS
]))), ((negate_rtx ((global_options.x_ix86_pmode == PMODE_DI ?
 (scalar_int_mode ((scalar_int_mode::from_int) E_DImode)) : (
scalar_int_mode ((scalar_int_mode::from_int) E_SImode))), plus_constant
 ((global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode
 ((scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode (
(scalar_int_mode::from_int) E_SImode))), size, extra)))) )
					       extra)))gen_rtx_fmt_ee_stat ((PLUS), (((global_options.x_ix86_pmode ==
 PMODE_DI ? (scalar_int_mode ((scalar_int_mode::from_int) E_DImode
)) : (scalar_int_mode ((scalar_int_mode::from_int) E_SImode))
))), ((((this_target_rtl->x_global_rtl)[GR_VIRTUAL_OUTGOING_ARGS
]))), ((negate_rtx ((global_options.x_ix86_pmode == PMODE_DI ?
 (scalar_int_mode ((scalar_int_mode::from_int) E_DImode)) : (
scalar_int_mode ((scalar_int_mode::from_int) E_SImode))), plus_constant
 ((global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode
 ((scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode (
(scalar_int_mode::from_int) E_SImode))), size, extra)))) );
    else
temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,gen_rtx_fmt_ee_stat ((PLUS), (((global_options.x_ix86_pmode ==
 PMODE_DI ? (scalar_int_mode ((scalar_int_mode::from_int) E_DImode
)) : (scalar_int_mode ((scalar_int_mode::from_int) E_SImode))
))), ((((this_target_rtl->x_global_rtl)[GR_VIRTUAL_OUTGOING_ARGS
]))), ((negate_rtx ((global_options.x_ix86_pmode == PMODE_DI ?
 (scalar_int_mode ((scalar_int_mode::from_int) E_DImode)) : (
scalar_int_mode ((scalar_int_mode::from_int) E_SImode))), size
))) )
	     negate_rtx (Pmode, size))gen_rtx_fmt_ee_stat ((PLUS), (((global_options.x_ix86_pmode ==
 PMODE_DI ? (scalar_int_mode ((scalar_int_mode::from_int) E_DImode
)) : (scalar_int_mode ((scalar_int_mode::from_int) E_SImode))
))), ((((this_target_rtl->x_global_rtl)[GR_VIRTUAL_OUTGOING_ARGS
]))), ((negate_rtx ((global_options.x_ix86_pmode == PMODE_DI ?
 (scalar_int_mode ((scalar_int_mode::from_int) E_DImode)) : (
scalar_int_mode ((scalar_int_mode::from_int) E_SImode))), size
))) );
  }

return memory_address (NARROWEST_INT_MODE, temp)memory_address_addr_space (((scalar_int_mode (scalar_int_mode
::from_int (class_narrowest_mode[MODE_INT])))), (temp), 0);
4505}

4507/* A utility routine that returns the base of an auto-inc memory, or NULL.  */

4509static rtx
4510mem_autoinc_base (rtx mem)
4511{
if (MEM_P (mem)(((enum rtx_code) (mem)->code) == MEM))
  {
    rtx addr = XEXP (mem, 0)(((mem)->u.fld[0]).rt_rtx);
    if (GET_RTX_CLASS (GET_CODE (addr))(rtx_class[(int) (((enum rtx_code) (addr)->code))]) == RTX_AUTOINC)
return XEXP (addr, 0)(((addr)->u.fld[0]).rt_rtx);
  }
return NULLnullptr;
4519}

4521/* A utility routine used here, in reload, and in try_split.  The insns
 after PREV up to and including LAST are known to adjust the stack,
 with a final value of END_ARGS_SIZE.  Iterate backward from LAST
 placing notes as appropriate.  PREV may be NULL, indicating the
 entire insn sequence prior to LAST should be scanned.

 The set of allowed stack pointer modifications is small:
   (1) One or more auto-inc style memory references (aka pushes),
   (2) One or more addition/subtraction with the SP as destination,
   (3) A single move insn with the SP as destination,
   (4) A call_pop insn,
   (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.

 Insns in the sequence that do not modify the SP are ignored,
 except for noreturn calls.

 The return value is the amount of adjustment that can be trivially
 verified, via immediate operand or auto-inc.  If the adjustment
 cannot be trivially extracted, the return value is HOST_WIDE_INT_MIN.  */

4541poly_int64
4542find_args_size_adjust (rtx_insn *insn)
4543{
rtx dest, set, pat;
int i;

pat = PATTERN (insn);
set = NULLnullptr;

/* Look for a call_pop pattern.  */
if (CALL_P (insn)(((enum rtx_code) (insn)->code) == CALL_INSN))
  {
    /* We have to allow non-call_pop patterns for the case
of emit_single_push_insn of a TLS address.  */
    if (GET_CODE (pat)((enum rtx_code) (pat)->code) != PARALLEL)
return 0;

    /* All call_pop have a stack pointer adjust in the parallel.
The call itself is always first, and the stack adjust is
usually last, so search from the end.  */
    for (i = XVECLEN (pat, 0)(((((pat)->u.fld[0]).rt_rtvec))->num_elem) - 1; i > 0; --i)
{
 set = XVECEXP (pat, 0, i)(((((pat)->u.fld[0]).rt_rtvec))->elem[i]);
 if (GET_CODE (set)((enum rtx_code) (set)->code) != SET)
   continue;
 dest = SET_DEST (set)(((set)->u.fld[0]).rt_rtx);
 if (dest == stack_pointer_rtx((this_target_rtl->x_global_rtl)[GR_STACK_POINTER]))
   break;
}
    /* We'd better have found the stack pointer adjust.  */
    if (i == 0)
return 0;
    /* Fall through to process the extracted SET and DEST
as if it was a standalone insn.  */
  }
else if (GET_CODE (pat)((enum rtx_code) (pat)->code) == SET)
  set = pat;
else if ((set = single_set (insn)) != NULLnullptr)
  ;
else if (GET_CODE (pat)((enum rtx_code) (pat)->code) == PARALLEL)
  {
    /* ??? Some older ports use a parallel with a stack adjust
and a store for a PUSH_ROUNDING pattern, rather than a
PRE/POST_MODIFY rtx.  Don't force them to update yet...  */
    /* ??? See h8300 and m68k, pushqi1.  */
    for (i = XVECLEN (pat, 0)(((((pat)->u.fld[0]).rt_rtvec))->num_elem) - 1; i >= 0; --i)
{
 set = XVECEXP (pat, 0, i)(((((pat)->u.fld[0]).rt_rtvec))->elem[i]);
 if (GET_CODE (set)((enum rtx_code) (set)->code) != SET)
   continue;
 dest = SET_DEST (set)(((set)->u.fld[0]).rt_rtx);
 if (dest == stack_pointer_rtx((this_target_rtl->x_global_rtl)[GR_STACK_POINTER]))
   break;

 /* We do not expect an auto-inc of the sp in the parallel.  */
 gcc_checking_assert (mem_autoinc_base (dest) != stack_pointer_rtx)((void)(!(mem_autoinc_base (dest) != ((this_target_rtl->x_global_rtl
)[GR_STACK_POINTER])) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 4596, __FUNCTION__), 0 : 0));
 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))((void)(!(mem_autoinc_base ((((set)->u.fld[1]).rt_rtx)) !=
 ((this_target_rtl->x_global_rtl)[GR_STACK_POINTER])) ? fancy_abort
 ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 4598, __FUNCTION__), 0 : 0))
	       != stack_pointer_rtx)((void)(!(mem_autoinc_base ((((set)->u.fld[1]).rt_rtx)) !=
 ((this_target_rtl->x_global_rtl)[GR_STACK_POINTER])) ? fancy_abort
 ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 4598, __FUNCTION__), 0 : 0));
}
    if (i < 0)
return 0;
  }
else
  return 0;

dest = SET_DEST (set)(((set)->u.fld[0]).rt_rtx);

/* Look for direct modifications of the stack pointer.  */
if (REG_P (dest)(((enum rtx_code) (dest)->code) == REG) && REGNO (dest)(rhs_regno(dest)) == STACK_POINTER_REGNUM7)
  {
    /* Look for a trivial adjustment, otherwise assume nothing.  */
    /* Note that the SPU restore_stack_block pattern refers to
the stack pointer in V4SImode.  Consider that non-trivial.  */
    poly_int64 offset;
    if (SCALAR_INT_MODE_P (GET_MODE (dest))(((enum mode_class) mode_class[((machine_mode) (dest)->mode
)]) == MODE_INT || ((enum mode_class) mode_class[((machine_mode
) (dest)->mode)]) == MODE_PARTIAL_INT)
 && strip_offset (SET_SRC (set)(((set)->u.fld[1]).rt_rtx), &offset) == stack_pointer_rtx((this_target_rtl->x_global_rtl)[GR_STACK_POINTER]))
return offset;
    /* ??? Reload can generate no-op moves, which will be cleaned
up later.  Recognize it and continue searching.  */
    else if (rtx_equal_p (dest, SET_SRC (set)(((set)->u.fld[1]).rt_rtx)))
return 0;
    else
return HOST_WIDE_INT_MIN(long) (1UL << (64 - 1));
  }
else
  {
    rtx mem, addr;

    /* Otherwise only think about autoinc patterns.  */
    if (mem_autoinc_base (dest) == stack_pointer_rtx((this_target_rtl->x_global_rtl)[GR_STACK_POINTER]))
{
 mem = dest;
 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))((void)(!(mem_autoinc_base ((((set)->u.fld[1]).rt_rtx)) !=
 ((this_target_rtl->x_global_rtl)[GR_STACK_POINTER])) ? fancy_abort
 ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 4634, __FUNCTION__), 0 : 0))
	       != stack_pointer_rtx)((void)(!(mem_autoinc_base ((((set)->u.fld[1]).rt_rtx)) !=
 ((this_target_rtl->x_global_rtl)[GR_STACK_POINTER])) ? fancy_abort
 ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 4634, __FUNCTION__), 0 : 0));
}
    else if (mem_autoinc_base (SET_SRC (set)(((set)->u.fld[1]).rt_rtx)) == stack_pointer_rtx((this_target_rtl->x_global_rtl)[GR_STACK_POINTER]))
mem = SET_SRC (set)(((set)->u.fld[1]).rt_rtx);
    else
return 0;

    addr = XEXP (mem, 0)(((mem)->u.fld[0]).rt_rtx);
    switch (GET_CODE (addr)((enum rtx_code) (addr)->code))
{
case PRE_INC:
case POST_INC:
 return GET_MODE_SIZE (GET_MODE (mem)((machine_mode) (mem)->mode));
case PRE_DEC:
case POST_DEC:
 return -GET_MODE_SIZE (GET_MODE (mem)((machine_mode) (mem)->mode));
case PRE_MODIFY:
case POST_MODIFY:
 addr = XEXP (addr, 1)(((addr)->u.fld[1]).rt_rtx);
 gcc_assert (GET_CODE (addr) == PLUS)((void)(!(((enum rtx_code) (addr)->code) == PLUS) ? fancy_abort
 ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 4653, __FUNCTION__), 0 : 0));
 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx)((void)(!((((addr)->u.fld[0]).rt_rtx) == ((this_target_rtl
->x_global_rtl)[GR_STACK_POINTER])) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 4654, __FUNCTION__), 0 : 0));
 return rtx_to_poly_int64 (XEXP (addr, 1)(((addr)->u.fld[1]).rt_rtx));
default:
 gcc_unreachable ()(fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 4657, __FUNCTION__));
}
  }
4660}

4662poly_int64
4663fixup_args_size_notes (rtx_insn *prev, rtx_insn *last,
       poly_int64 end_args_size)
4665{
poly_int64 args_size = end_args_size;
bool saw_unknown = false;
rtx_insn *insn;

for (insn = last; insn != prev; insn = PREV_INSN (insn))
  {
    if (!NONDEBUG_INSN_P (insn)((((enum rtx_code) (insn)->code) == INSN) || (((enum rtx_code
) (insn)->code) == JUMP_INSN) || (((enum rtx_code) (insn)->
code) == CALL_INSN)))
continue;

    /* We might have existing REG_ARGS_SIZE notes, e.g. when pushing
a call argument containing a TLS address that itself requires
a call to __tls_get_addr.  The handling of stack_pointer_delta
in emit_single_push_insn is supposed to ensure that any such
notes are already correct.  */
    rtx note = find_reg_note (insn, REG_ARGS_SIZE, NULL_RTX(rtx) 0);
    gcc_assert (!note || known_eq (args_size, get_args_size (note)))((void)(!(!note || (!maybe_ne (args_size, get_args_size (note
)))) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 4681, __FUNCTION__), 0 : 0));

    poly_int64 this_delta = find_args_size_adjust (insn);
    if (known_eq (this_delta, 0)(!maybe_ne (this_delta, 0)))
{
 if (!CALL_P (insn)(((enum rtx_code) (insn)->code) == CALL_INSN)
     || ACCUMULATE_OUTGOING_ARGS((((global_options.x_target_flags & (1U << 3)) != 0
) && optimize_function_for_speed_p ((cfun + 0))) || (
(cfun + 0)->machine->func_type != TYPE_NORMAL &&
 (&x_rtl)->stack_realign_needed) || ((global_options.x_target_flags
 & (1U << 26)) != 0) || (((global_options.x_ix86_isa_flags
 & (1UL << 1)) != 0) && ix86_cfun_abi () ==
 MS_ABI) || (0 && (&x_rtl)->profile))
     || find_reg_note (insn, REG_NORETURN, NULL_RTX(rtx) 0) == NULL_RTX(rtx) 0)
   continue;
}

    gcc_assert (!saw_unknown)((void)(!(!saw_unknown) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 4692, __FUNCTION__), 0 : 0));
    if (known_eq (this_delta, HOST_WIDE_INT_MIN)(!maybe_ne (this_delta, (long) (1UL << (64 - 1)))))
saw_unknown = true;

    if (!note)
add_args_size_note (insn, args_size);
    if (STACK_GROWS_DOWNWARD1)
this_delta = -poly_uint64 (this_delta);

    if (saw_unknown)
args_size = HOST_WIDE_INT_MIN(long) (1UL << (64 - 1));
    else
args_size -= this_delta;
  }

return args_size;
4708}

4710#ifdef PUSH_ROUNDING
4711/* Emit single push insn.  */

4713static void
4714emit_single_push_insn_1 (machine_mode mode, rtx x, tree type)
4715{
rtx dest_addr;
poly_int64 rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode))ix86_push_rounding (GET_MODE_SIZE (mode));
rtx dest;
enum insn_code icode;

/* If there is push pattern, use it.  Otherwise try old way of throwing
   MEM representing push operation to move expander.  */
icode = optab_handler (push_optab, mode);
if (icode != CODE_FOR_nothing)
  {
    class expand_operand ops[1];

    create_input_operand (&ops[0], x, mode);
    if (maybe_expand_insn (icode, 1, ops))
return;
  }
if (known_eq (GET_MODE_SIZE (mode), rounded_size)(!maybe_ne (GET_MODE_SIZE (mode), rounded_size)))
  dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx)gen_rtx_fmt_e_stat ((PRE_DEC), ((global_options.x_ix86_pmode ==
 PMODE_DI ? (scalar_int_mode ((scalar_int_mode::from_int) E_DImode
)) : (scalar_int_mode ((scalar_int_mode::from_int) E_SImode))
)), (((this_target_rtl->x_global_rtl)[GR_STACK_POINTER])) );
/* If we are to pad downward, adjust the stack pointer first and
   then store X into the stack location using an offset.  This is
   because emit_move_insn does not know how to pad; it does not have
   access to type.  */
else if (targetm.calls.function_arg_padding (mode, type) == PAD_DOWNWARD)
  {
    emit_move_insn (stack_pointer_rtx((this_target_rtl->x_global_rtl)[GR_STACK_POINTER]),
      expand_binop (Pmode(global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode (
(scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode))),
		    STACK_GROWS_DOWNWARD1 ? sub_optab
		    : add_optab,
		    stack_pointer_rtx((this_target_rtl->x_global_rtl)[GR_STACK_POINTER]),
		    gen_int_mode (rounded_size, Pmode(global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode (
(scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode)))),
		    NULL_RTX(rtx) 0, 0, OPTAB_LIB_WIDEN));

    poly_int64 offset = rounded_size - GET_MODE_SIZE (mode);
    if (STACK_GROWS_DOWNWARD1 && STACK_PUSH_CODEPRE_DEC == POST_DEC)
/* We have already decremented the stack pointer, so get the
  previous value.  */
offset += rounded_size;

    if (!STACK_GROWS_DOWNWARD1 && STACK_PUSH_CODEPRE_DEC == POST_INC)
/* We have already incremented the stack pointer, so get the
  previous value.  */
offset -= rounded_size;

    dest_addr = plus_constant (Pmode(global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode (
(scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode))), stack_pointer_rtx((this_target_rtl->x_global_rtl)[GR_STACK_POINTER]), offset);
  }
else
  {
    if (STACK_GROWS_DOWNWARD1)
/* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC.  */
dest_addr = plus_constant (Pmode(global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode (
(scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode))), stack_pointer_rtx((this_target_rtl->x_global_rtl)[GR_STACK_POINTER]), -rounded_size);
    else
/* ??? This seems wrong if STACK_PUSH_CODE == POST_INC.  */
dest_addr = plus_constant (Pmode(global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode (
(scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode))), stack_pointer_rtx((this_target_rtl->x_global_rtl)[GR_STACK_POINTER]), rounded_size);

    dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr)gen_rtx_fmt_ee_stat ((PRE_MODIFY), (((global_options.x_ix86_pmode
 == PMODE_DI ? (scalar_int_mode ((scalar_int_mode::from_int) E_DImode
)) : (scalar_int_mode ((scalar_int_mode::from_int) E_SImode))
))), ((((this_target_rtl->x_global_rtl)[GR_STACK_POINTER])
)), ((dest_addr)) );
  }

dest = gen_rtx_MEM (mode, dest_addr);

if (type != 0)
  {
    set_mem_attributes (dest, type, 1);

    if (cfun(cfun + 0)->tail_call_marked)
/* Function incoming arguments may overlap with sibling call
  outgoing arguments and we cannot allow reordering of reads
  from function arguments with stores to outgoing arguments
  of sibling calls.  */
set_mem_alias_set (dest, 0);
  }
emit_move_insn (dest, x);
4787}

4789/* Emit and annotate a single push insn.  */

4791static void
4792emit_single_push_insn (machine_mode mode, rtx x, tree type)
4793{
poly_int64 delta, old_delta = stack_pointer_delta((&x_rtl)->expr.x_stack_pointer_delta);
rtx_insn *prev = get_last_insn ();
rtx_insn *last;

emit_single_push_insn_1 (mode, x, type);

/* Adjust stack_pointer_delta to describe the situation after the push
   we just performed.  Note that we must do this after the push rather
   than before the push in case calculating X needs pushes and pops of
   its own (e.g. if calling __tls_get_addr).  The REG_ARGS_SIZE notes
   for such pushes and pops must not include the effect of the future
   push of X.  */
stack_pointer_delta((&x_rtl)->expr.x_stack_pointer_delta) += PUSH_ROUNDING (GET_MODE_SIZE (mode))ix86_push_rounding (GET_MODE_SIZE (mode));

last = get_last_insn ();

/* Notice the common case where we emitted exactly one insn.  */
if (PREV_INSN (last) == prev)
  {
    add_args_size_note (last, stack_pointer_delta((&x_rtl)->expr.x_stack_pointer_delta));
    return;
  }

delta = fixup_args_size_notes (prev, last, stack_pointer_delta((&x_rtl)->expr.x_stack_pointer_delta));
gcc_assert (known_eq (delta, HOST_WIDE_INT_MIN)((void)(!((!maybe_ne (delta, (long) (1UL << (64 - 1))))
 || (!maybe_ne (delta, old_delta))) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 4819, __FUNCTION__), 0 : 0))
     || known_eq (delta, old_delta))((void)(!((!maybe_ne (delta, (long) (1UL << (64 - 1))))
 || (!maybe_ne (delta, old_delta))) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 4819, __FUNCTION__), 0 : 0));
4820}
4821#endif

4823/* If reading SIZE bytes from X will end up reading from
 Y return the number of bytes that overlap.  Return -1
 if there is no overlap or -2 if we can't determine
 (for example when X and Y have different base registers).  */

4828static int
4829memory_load_overlap (rtx x, rtx y, HOST_WIDE_INTlong size)
4830{
rtx tmp = plus_constant (Pmode(global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode (
(scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode))), x, size);
rtx sub = simplify_gen_binary (MINUS, Pmode(global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode (
(scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode))), tmp, y);

if (!CONST_INT_P (sub)(((enum rtx_code) (sub)->code) == CONST_INT))
  return -2;

HOST_WIDE_INTlong val = INTVAL (sub)((sub)->u.hwint[0]);

return IN_RANGE (val, 1, size)((unsigned long) (val) - (unsigned long) (1) <= (unsigned long
) (size) - (unsigned long) (1)) ? val : -1;
4840}

4842/* Generate code to push X onto the stack, assuming it has mode MODE and
 type TYPE.
 MODE is redundant except when X is a CONST_INT (since they don't
 carry mode info).
 SIZE is an rtx for the size of data to be copied (in bytes),
 needed only if X is BLKmode.
 Return true if successful.  May return false if asked to push a
 partial argument during a sibcall optimization (as specified by
 SIBCALL_P) and the incoming and outgoing pointers cannot be shown
 to not overlap.

 ALIGN (in bits) is maximum alignment we can assume.

 If PARTIAL and REG are both nonzero, then copy that many of the first
 bytes of X into registers starting with REG, and push the rest of X.
 The amount of space pushed is decreased by PARTIAL bytes.
 REG must be a hard register in this case.
 If REG is zero but PARTIAL is not, take any all others actions for an
 argument partially in registers, but do not actually load any
 registers.

 EXTRA is the amount in bytes of extra space to leave next to this arg.
 This is ignored if an argument block has already been allocated.

 On a machine that lacks real push insns, ARGS_ADDR is the address of
 the bottom of the argument block for this call.  We use indexing off there
 to store the arg.  On machines with push insns, ARGS_ADDR is 0 when a
 argument block has not been preallocated.

 ARGS_SO_FAR is the size of args previously pushed for this call.

 REG_PARM_STACK_SPACE is nonzero if functions require stack space
 for arguments passed in registers.  If nonzero, it will be the number
 of bytes required.  */

4877bool
4878emit_push_insn (rtx x, machine_mode mode, tree type, rtx size,
unsigned int align, int partial, rtx reg, poly_int64 extra,
rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
rtx alignment_pad, bool sibcall_p)
4882{
rtx xinner;
pad_direction stack_direction
  = STACK_GROWS_DOWNWARD1 ? PAD_DOWNWARD : PAD_UPWARD;

/* Decide where to pad the argument: PAD_DOWNWARD for below,
   PAD_UPWARD for above, or PAD_NONE for don't pad it.
   Default is below for small data on big-endian machines; else above.  */
pad_direction where_pad = targetm.calls.function_arg_padding (mode, type);

/* Invert direction if stack is post-decrement.
   FIXME: why?  */
if (STACK_PUSH_CODEPRE_DEC == POST_DEC)
  if (where_pad != PAD_NONE)
    where_pad = (where_pad == PAD_DOWNWARD ? PAD_UPWARD : PAD_DOWNWARD);

xinner = x;

int nregs = partial / UNITS_PER_WORD(((global_options.x_ix86_isa_flags & (1UL << 1)) !=
 0) ? 8 : 4);
rtx *tmp_regs = NULLnullptr;
int overlapping = 0;

if (mode == BLKmode((void) 0, E_BLKmode)
    || (STRICT_ALIGNMENT0 && align < GET_MODE_ALIGNMENT (mode)get_mode_alignment (mode)))
  {
    /* Copy a block into the stack, entirely or partially.  */

    rtx temp;
    int used;
    int offset;
    int skip;

    offset = partial % (PARM_BOUNDARY((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4)) / BITS_PER_UNIT(8));
    used = partial - offset;

    if (mode != BLKmode((void) 0, E_BLKmode))
{
 /* A value is to be stored in an insufficiently aligned
    stack slot; copy via a suitably aligned slot if
    necessary.  */
 size = gen_int_mode (GET_MODE_SIZE (mode), Pmode(global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode (
(scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode))));
 if (!MEM_P (xinner)(((enum rtx_code) (xinner)->code) == MEM))
   {
     temp = assign_temp (type, 1, 1);
     emit_move_insn (temp, xinner);
     xinner = temp;
   }
}

    gcc_assert (size)((void)(!(size) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 4931, __FUNCTION__), 0 : 0));

    /* USED is now the # of bytes we need not copy to the stack
because registers will take care of them.  */

    if (partial != 0)
xinner = adjust_address (xinner, BLKmode, used)adjust_address_1 (xinner, ((void) 0, E_BLKmode), used, 1, 1, 0
, 0);

    /* If the partial register-part of the arg counts in its stack size,
skip the part of stack space corresponding to the registers.
Otherwise, start copying to the beginning of the stack space,
by setting SKIP to 0.  */
    skip = (reg_parm_stack_space == 0) ? 0 : used;

4945#ifdef PUSH_ROUNDING
    /* NB: Let the backend known the number of bytes to push and
decide if push insns should be generated.  */
    unsigned int push_size;
    if (CONST_INT_P (size)(((enum rtx_code) (size)->code) == CONST_INT))
push_size = INTVAL (size)((size)->u.hwint[0]);
    else
push_size = 0;

    /* Do it with several push insns if that doesn't take lots of insns
and if there is no difficulty with push insns that skip bytes
on the stack for alignment purposes.  */
    if (args_addr == 0
 && targetm.calls.push_argument (push_size)
 && CONST_INT_P (size)(((enum rtx_code) (size)->code) == CONST_INT)
 && skip == 0
 && MEM_ALIGN (xinner)(get_mem_attrs (xinner)->align) >= align
 && can_move_by_pieces ((unsigned) INTVAL (size)((size)->u.hwint[0]) - used, align)
 /* Here we avoid the case of a structure whose weak alignment
    forces many pushes of a small amount of data,
    and such small pushes do rounding that causes trouble.  */
 && ((!targetm.slow_unaligned_access (word_mode, align))
     || align >= BIGGEST_ALIGNMENT(((global_options.x_target_flags & (1U << 12)) != 0
) ? 32 : (((global_options.x_ix86_isa_flags & (1UL <<
 15)) != 0) ? 512 : (((global_options.x_ix86_isa_flags & (
1UL << 8)) != 0) ? 256 : 128)))
     || known_eq (PUSH_ROUNDING (align / BITS_PER_UNIT),(!maybe_ne (ix86_push_rounding (align / (8)), align / (8)))
	   align / BITS_PER_UNIT)(!maybe_ne (ix86_push_rounding (align / (8)), align / (8))))
 && known_eq (PUSH_ROUNDING (INTVAL (size)), INTVAL (size))(!maybe_ne (ix86_push_rounding (((size)->u.hwint[0])), ((size
)->u.hwint[0]))))
{
 /* Push padding now if padding above and stack grows down,
    or if padding below and stack grows up.
    But if space already allocated, this has already been done.  */
 if (maybe_ne (extra, 0)
     && args_addr == 0
     && where_pad != PAD_NONE
     && where_pad != stack_direction)
   anti_adjust_stack (gen_int_mode (extra, Pmode(global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode (
(scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode)))));

 move_by_pieces (NULLnullptr, xinner, INTVAL (size)((size)->u.hwint[0]) - used, align,
	  RETURN_BEGIN);
}
    else
4985#endif /* PUSH_ROUNDING  */
{
 rtx target;

 /* Otherwise make space on the stack and copy the data
    to the address of that space.  */

 /* Deduct words put into registers from the size we must copy.  */
 if (partial != 0)
   {
     if (CONST_INT_P (size)(((enum rtx_code) (size)->code) == CONST_INT))
size = GEN_INT (INTVAL (size) - used)gen_rtx_CONST_INT (((void) 0, E_VOIDmode), (((size)->u.hwint
[0]) - used));
     else
size = expand_binop (GET_MODE (size)((machine_mode) (size)->mode), sub_optab, size,
		     gen_int_mode (used, GET_MODE (size)((machine_mode) (size)->mode)),
		     NULL_RTX(rtx) 0, 0, OPTAB_LIB_WIDEN);
   }

 /* Get the address of the stack space.
    In this case, we do not deal with EXTRA separately.
    A single stack adjust will do.  */
 poly_int64 const_args_so_far;
 if (! args_addr)
   {
     temp = push_block (size, extra, where_pad == PAD_DOWNWARD);
     extra = 0;
   }
 else if (poly_int_rtx_p (args_so_far, &const_args_so_far))
   temp = memory_address (BLKmode,memory_address_addr_space ((((void) 0, E_BLKmode)), (plus_constant
 ((global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode
 ((scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode (
(scalar_int_mode::from_int) E_SImode))), args_addr, skip + const_args_so_far
)), 0)
		   plus_constant (Pmode, args_addr,memory_address_addr_space ((((void) 0, E_BLKmode)), (plus_constant
 ((global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode
 ((scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode (
(scalar_int_mode::from_int) E_SImode))), args_addr, skip + const_args_so_far
)), 0)
				  skip + const_args_so_far))memory_address_addr_space ((((void) 0, E_BLKmode)), (plus_constant
 ((global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode
 ((scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode (
(scalar_int_mode::from_int) E_SImode))), args_addr, skip + const_args_so_far
)), 0);
 else
   temp = memory_address (BLKmode,memory_address_addr_space ((((void) 0, E_BLKmode)), (plus_constant
 ((global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode
 ((scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode (
(scalar_int_mode::from_int) E_SImode))), gen_rtx_fmt_ee_stat (
(PLUS), (((global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode
 ((scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode (
(scalar_int_mode::from_int) E_SImode))))), ((args_addr)), ((args_so_far
)) ), skip)), 0)
		   plus_constant (Pmode,memory_address_addr_space ((((void) 0, E_BLKmode)), (plus_constant
 ((global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode
 ((scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode (
(scalar_int_mode::from_int) E_SImode))), gen_rtx_fmt_ee_stat (
(PLUS), (((global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode
 ((scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode (
(scalar_int_mode::from_int) E_SImode))))), ((args_addr)), ((args_so_far
)) ), skip)), 0)
				  gen_rtx_PLUS (Pmode,memory_address_addr_space ((((void) 0, E_BLKmode)), (plus_constant
 ((global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode
 ((scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode (
(scalar_int_mode::from_int) E_SImode))), gen_rtx_fmt_ee_stat (
(PLUS), (((global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode
 ((scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode (
(scalar_int_mode::from_int) E_SImode))))), ((args_addr)), ((args_so_far
)) ), skip)), 0)
						args_addr,memory_address_addr_space ((((void) 0, E_BLKmode)), (plus_constant
 ((global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode
 ((scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode (
(scalar_int_mode::from_int) E_SImode))), gen_rtx_fmt_ee_stat (
(PLUS), (((global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode
 ((scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode (
(scalar_int_mode::from_int) E_SImode))))), ((args_addr)), ((args_so_far
)) ), skip)), 0)
						args_so_far),memory_address_addr_space ((((void) 0, E_BLKmode)), (plus_constant
 ((global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode
 ((scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode (
(scalar_int_mode::from_int) E_SImode))), gen_rtx_fmt_ee_stat (
(PLUS), (((global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode
 ((scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode (
(scalar_int_mode::from_int) E_SImode))))), ((args_addr)), ((args_so_far
)) ), skip)), 0)
				  skip))memory_address_addr_space ((((void) 0, E_BLKmode)), (plus_constant
 ((global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode
 ((scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode (
(scalar_int_mode::from_int) E_SImode))), gen_rtx_fmt_ee_stat (
(PLUS), (((global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode
 ((scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode (
(scalar_int_mode::from_int) E_SImode))))), ((args_addr)), ((args_so_far
)) ), skip)), 0);

 if (!ACCUMULATE_OUTGOING_ARGS((((global_options.x_target_flags & (1U << 3)) != 0
) && optimize_function_for_speed_p ((cfun + 0))) || (
(cfun + 0)->machine->func_type != TYPE_NORMAL &&
 (&x_rtl)->stack_realign_needed) || ((global_options.x_target_flags
 & (1U << 26)) != 0) || (((global_options.x_ix86_isa_flags
 & (1UL << 1)) != 0) && ix86_cfun_abi () ==
 MS_ABI) || (0 && (&x_rtl)->profile)))
   {
     /* If the source is referenced relative to the stack pointer,
 copy it to another register to stabilize it.  We do not need
 to do this if we know that we won't be changing sp.  */

     if (reg_mentioned_p (virtual_stack_dynamic_rtx((this_target_rtl->x_global_rtl)[GR_VIRTUAL_STACK_DYNAMIC]
), temp)
  || reg_mentioned_p (virtual_outgoing_args_rtx((this_target_rtl->x_global_rtl)[GR_VIRTUAL_OUTGOING_ARGS]
), temp))
temp = copy_to_reg (temp);
   }

 target = gen_rtx_MEM (BLKmode((void) 0, E_BLKmode), temp);

 /* We do *not* set_mem_attributes here, because incoming arguments
    may overlap with sibling call outgoing arguments and we cannot
    allow reordering of reads from function arguments with stores
    to outgoing arguments of sibling calls.  We do, however, want
    to record the alignment of the stack slot.  */
 /* ALIGN may well be better aligned than TYPE, e.g. due to
    PARM_BOUNDARY.  Assume the caller isn't lying.  */
 set_mem_align (target, align);

 /* If part should go in registers and pushing to that part would
    overwrite some of the values that need to go into regs, load the
    overlapping values into temporary pseudos to be moved into the hard
    regs at the end after the stack pushing has completed.
    We cannot load them directly into the hard regs here because
    they can be clobbered by the block move expansions.
    See PR 65358.  */

 if (partial > 0 && reg != 0 && mode == BLKmode((void) 0, E_BLKmode)
     && GET_CODE (reg)((enum rtx_code) (reg)->code) != PARALLEL)
   {
     overlapping = memory_load_overlap (XEXP (x, 0)(((x)->u.fld[0]).rt_rtx), temp, partial);
     if (overlapping > 0)
       {
  gcc_assert (overlapping % UNITS_PER_WORD == 0)((void)(!(overlapping % (((global_options.x_ix86_isa_flags &
 (1UL << 1)) != 0) ? 8 : 4) == 0) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 5060, __FUNCTION__), 0 : 0));
  overlapping /= UNITS_PER_WORD(((global_options.x_ix86_isa_flags & (1UL << 1)) !=
 0) ? 8 : 4);

  tmp_regs = XALLOCAVEC (rtx, overlapping)((rtx *) __builtin_alloca(sizeof (rtx) * (overlapping)));

  for (int i = 0; i < overlapping; i++)
    tmp_regs[i] = gen_reg_rtx (word_mode);

  for (int i = 0; i < overlapping; i++)
    emit_move_insn (tmp_regs[i],
		    operand_subword_force (target, i, mode));
       }
     else if (overlapping == -1)
overlapping = 0;
     /* Could not determine whether there is overlap.
        Fail the sibcall.  */
     else
{
  overlapping = 0;
  if (sibcall_p)
    return false;
}
   }

 /* If source is a constant VAR_DECL with a simple constructor,
           store the constructor to the stack instead of moving it.  */
 const_tree decl;
 if (partial == 0
     && MEM_P (xinner)(((enum rtx_code) (xinner)->code) == MEM)
     && SYMBOL_REF_P (XEXP (xinner, 0))(((enum rtx_code) ((((xinner)->u.fld[0]).rt_rtx))->code
) == SYMBOL_REF)
     && (decl = SYMBOL_REF_DECL (XEXP (xinner, 0))((__extension__ ({ __typeof (((((xinner)->u.fld[0]).rt_rtx
))) const _rtx = (((((xinner)->u.fld[0]).rt_rtx))); if (((
enum rtx_code) (_rtx)->code) != SYMBOL_REF) rtl_check_failed_flag
 ("CONSTANT_POOL_ADDRESS_P", _rtx, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 5090, __FUNCTION__); _rtx; })->unchanging) ? nullptr : (
((((((xinner)->u.fld[0]).rt_rtx)))->u.fld[1]).rt_tree))) != NULL_TREE(tree) nullptr
     && VAR_P (decl)(((enum tree_code) (decl)->base.code) == VAR_DECL)
     && TREE_READONLY (decl)((non_type_check ((decl), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 5092, __FUNCTION__))->base.readonly_flag)
     && !TREE_SIDE_EFFECTS (decl)((non_type_check ((decl), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 5093, __FUNCTION__))->base.side_effects_flag)
     && immediate_const_ctor_p (DECL_INITIAL (decl)((contains_struct_check ((decl), (TS_DECL_COMMON), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 5094, __FUNCTION__))->decl_common.initial), 2))
   store_constructor (DECL_INITIAL (decl)((contains_struct_check ((decl), (TS_DECL_COMMON), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 5095, __FUNCTION__))->decl_common.initial), target, 0,
	       int_expr_size (DECL_INITIAL (decl)((contains_struct_check ((decl), (TS_DECL_COMMON), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 5096, __FUNCTION__))->decl_common.initial)), false);
 else
   emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
}
  }
else if (partial > 0)
  {
    /* Scalar partly in registers.  This case is only supported
for fixed-wdth modes.  */
    int num_words = GET_MODE_SIZE (mode).to_constant ();
    num_words /= UNITS_PER_WORD(((global_options.x_ix86_isa_flags & (1UL << 1)) !=
 0) ? 8 : 4);
    int i;
    int not_stack;
    /* # bytes of start of argument
that we must make space for but need not store.  */
    int offset = partial % (PARM_BOUNDARY((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4)) / BITS_PER_UNIT(8));
    int args_offset = INTVAL (args_so_far)((args_so_far)->u.hwint[0]);
    int skip;

    /* Push padding now if padding above and stack grows down,
or if padding below and stack grows up.
But if space already allocated, this has already been done.  */
    if (maybe_ne (extra, 0)
 && args_addr == 0
 && where_pad != PAD_NONE
 && where_pad != stack_direction)
anti_adjust_stack (gen_int_mode (extra, Pmode(global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode (
(scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode)))));

    /* If we make space by pushing it, we might as well push
the real data.  Otherwise, we can leave OFFSET nonzero
and leave the space uninitialized.  */
    if (args_addr == 0)
offset = 0;

    /* Now NOT_STACK gets the number of words that we don't need to
allocate on the stack.  Convert OFFSET to words too.  */
    not_stack = (partial - offset) / UNITS_PER_WORD(((global_options.x_ix86_isa_flags & (1UL << 1)) !=
 0) ? 8 : 4);
    offset /= UNITS_PER_WORD(((global_options.x_ix86_isa_flags & (1UL << 1)) !=
 0) ? 8 : 4);

    /* If the partial register-part of the arg counts in its stack size,
skip the part of stack space corresponding to the registers.
Otherwise, start copying to the beginning of the stack space,
by setting SKIP to 0.  */
    skip = (reg_parm_stack_space == 0) ? 0 : not_stack;

    if (CONSTANT_P (x)((rtx_class[(int) (((enum rtx_code) (x)->code))]) == RTX_CONST_OBJ
) && !targetm.legitimate_constant_p (mode, x))
x = validize_mem (force_const_mem (mode, x));

    /* If X is a hard register in a non-integer mode, copy it into a pseudo;
SUBREGs of such registers are not allowed.  */
    if ((REG_P (x)(((enum rtx_code) (x)->code) == REG) && REGNO (x)(rhs_regno(x)) < FIRST_PSEUDO_REGISTER76
  && GET_MODE_CLASS (GET_MODE (x))((enum mode_class) mode_class[((machine_mode) (x)->mode)]) != MODE_INT))
x = copy_to_reg (x);

    /* Loop over all the words allocated on the stack for this arg.  */
    /* We can do it by words, because any scalar bigger than a word
has a size a multiple of a word.  */
    for (i = num_words - 1; i >= not_stack; i--)
if (i >= not_stack + offset)
 if (!emit_push_insn (operand_subword_force (x, i, mode),
	  word_mode, NULL_TREE(tree) nullptr, NULL_RTX(rtx) 0, align, 0, NULL_RTX(rtx) 0,
	  0, args_addr,
	  GEN_INT (args_offset + ((i - not_stack + skip)gen_rtx_CONST_INT (((void) 0, E_VOIDmode), (args_offset + ((i
 - not_stack + skip) * (((global_options.x_ix86_isa_flags &
 (1UL << 1)) != 0) ? 8 : 4))))
				  * UNITS_PER_WORD))gen_rtx_CONST_INT (((void) 0, E_VOIDmode), (args_offset + ((i
 - not_stack + skip) * (((global_options.x_ix86_isa_flags &
 (1UL << 1)) != 0) ? 8 : 4)))),
	  reg_parm_stack_space, alignment_pad, sibcall_p))
   return false;
  }
else
  {
    rtx addr;
    rtx dest;

    /* Push padding now if padding above and stack grows down,
or if padding below and stack grows up.
But if space already allocated, this has already been done.  */
    if (maybe_ne (extra, 0)
 && args_addr == 0
 && where_pad != PAD_NONE
 && where_pad != stack_direction)
anti_adjust_stack (gen_int_mode (extra, Pmode(global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode (
(scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode)))));

5177#ifdef PUSH_ROUNDING
    if (args_addr == 0 && targetm.calls.push_argument (0))
emit_single_push_insn (mode, x, type);
    else
5181#endif
{
 addr = simplify_gen_binary (PLUS, Pmode(global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode (
(scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode))), args_addr, args_so_far);
 dest = gen_rtx_MEM (mode, memory_address (mode, addr)memory_address_addr_space ((mode), (addr), 0));

 /* We do *not* set_mem_attributes here, because incoming arguments
    may overlap with sibling call outgoing arguments and we cannot
    allow reordering of reads from function arguments with stores
    to outgoing arguments of sibling calls.  We do, however, want
    to record the alignment of the stack slot.  */
 /* ALIGN may well be better aligned than TYPE, e.g. due to
    PARM_BOUNDARY.  Assume the caller isn't lying.  */
 set_mem_align (dest, align);

 emit_move_insn (dest, x);
}
  }

/* Move the partial arguments into the registers and any overlapping
   values that we moved into the pseudos in tmp_regs.  */
if (partial > 0 && reg != 0)
  {
    /* Handle calls that pass values in multiple non-contiguous locations.
The Irix 6 ABI has examples of this.  */
    if (GET_CODE (reg)((enum rtx_code) (reg)->code) == PARALLEL)
emit_group_load (reg, x, type, -1);
    else
      {
 gcc_assert (partial % UNITS_PER_WORD == 0)((void)(!(partial % (((global_options.x_ix86_isa_flags & (
1UL << 1)) != 0) ? 8 : 4) == 0) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 5209, __FUNCTION__), 0 : 0));
 move_block_to_reg (REGNO (reg)(rhs_regno(reg)), x, nregs - overlapping, mode);

 for (int i = 0; i < overlapping; i++)
   emit_move_insn (gen_rtx_REG (word_mode, REGNO (reg)(rhs_regno(reg))
				    + nregs - overlapping + i),
	    tmp_regs[i]);

}
  }

if (maybe_ne (extra, 0) && args_addr == 0 && where_pad == stack_direction)
  anti_adjust_stack (gen_int_mode (extra, Pmode(global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode (
(scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode)))));

if (alignment_pad && args_addr == 0)
  anti_adjust_stack (alignment_pad);

return true;
5227}
5228
5229/* Return X if X can be used as a subtarget in a sequence of arithmetic
 operations.  */

5232static rtx
5233get_subtarget (rtx x)
5234{
return (optimizeglobal_options.x_optimize
        || x == 0
  /* Only registers can be subtargets.  */
  || !REG_P (x)(((enum rtx_code) (x)->code) == REG)
  /* Don't use hard regs to avoid extending their life.  */
  || REGNO (x)(rhs_regno(x)) < FIRST_PSEUDO_REGISTER76
 ? 0 : x);
5242}

5244/* A subroutine of expand_assignment.  Optimize FIELD op= VAL, where
 FIELD is a bitfield.  Returns true if the optimization was successful,
 and there's nothing else to do.  */

5248static bool
5249optimize_bitfield_assignment_op (poly_uint64 pbitsize,
		 poly_uint64 pbitpos,
		 poly_uint64 pbitregion_start,
		 poly_uint64 pbitregion_end,
		 machine_mode mode1, rtx str_rtx,
		 tree to, tree src, bool reverse)
5255{
/* str_mode is not guaranteed to be a scalar type.  */
machine_mode str_mode = GET_MODE (str_rtx)((machine_mode) (str_rtx)->mode);
unsigned int str_bitsize;
tree op0, op1;
rtx value, result;
optab binop;
gimple *srcstmt;
enum tree_code code;

unsigned HOST_WIDE_INTlong bitsize, bitpos, bitregion_start, bitregion_end;
if (mode1 != VOIDmode((void) 0, E_VOIDmode)
    || !pbitsize.is_constant (&bitsize)
    || !pbitpos.is_constant (&bitpos)
    || !pbitregion_start.is_constant (&bitregion_start)
    || !pbitregion_end.is_constant (&bitregion_end)
    || bitsize >= BITS_PER_WORD((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4))
    || !GET_MODE_BITSIZE (str_mode).is_constant (&str_bitsize)
    || str_bitsize > BITS_PER_WORD((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4))
    || TREE_SIDE_EFFECTS (to)((non_type_check ((to), "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 5274, __FUNCTION__))->base.side_effects_flag)
    || TREE_THIS_VOLATILE (to)((to)->base.volatile_flag))
  return false;

STRIP_NOPS (src)(src) = tree_strip_nop_conversions ((const_cast<union tree_node
 *> (((src)))));
if (TREE_CODE (src)((enum tree_code) (src)->base.code) != SSA_NAME)
  return false;
if (TREE_CODE (TREE_TYPE (src))((enum tree_code) (((contains_struct_check ((src), (TS_TYPED)
, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/expr.cc"
, 5281, __FUNCTION__))->typed.type))->base.code) != INTEGER_TYPE)
  return false;

srcstmt = get_gimple_for_ssa_name (src);
if (!srcstmt
    || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt))tree_code_type_tmpl <0>::tree_code_type[(int) (gimple_assign_rhs_code
 (srcstmt))] != tcc_binary)
  return false;

code = gimple_assign_rhs_code (srcstmt);

op0 = gimple_assign_rhs1 (srcstmt);

/* If OP0 is an SSA_NAME, then we want to walk the use-def chain
   to find its initialization.  Hopefully the initialization will
   be from a bitfield load.  */
if (TREE_CODE (op0)((enum tree_code) (op0)->base.code) == SSA_NAME)
  {
    gimple *op0stmt = get_gimple_for_ssa_name (op0);

    /* We want to eventually have OP0 be the same as TO, which
should be a bitfield.  */
    if (!op0stmt
 || !is_gimple_assign (op0stmt)
 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to)((enum tree_code) (to)->base.code))
return false;
    op0 = gimple_assign_rhs1 (op0stmt);
  }

op1 = gimple_assign_rhs2 (srcstmt);

if (!operand_equal_p (to, op0, 0))
  return false;

if (MEM_P (str_rtx)(((enum rtx_code) (str_rtx)->code) == MEM))
  {
    unsigned HOST_WIDE_INTlong offset1;

    if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4)))
str_bitsize = BITS_PER_WORD((8) * (((global_options.x_ix86_isa_flags & (1UL <<
 1)) != 0) ? 8 : 4));

    scalar_int_mode best_mode;
    if (!get_best_mode (bitsize, bitpos, bitregion_start, bitregion_end,
	  MEM_ALIGN (str_rtx)(get_mem_attrs (str_rtx)->align), str_bitsize, false, &best_mode))
return false;
    str_mode = best_mode;
    str_bitsize = GET_MODE_BITSIZE (best_mode);

    offset1 = bitpos;
    bitpos %= str_bitsize;
    offset1 = (offset1 - bitpos) / BITS_PER_UNIT(8);
    str_rtx = adjust_address (str_rtx, str_mode, offset1)adjust_address_1 (str_rtx, str_mode, offset1, 1, 1, 0, 0);
  }
else if (!REG_P (str_rtx)(((enum rtx_code) (str_rtx)->code) == REG) && GET_CODE (str_rtx)((enum rtx_code) (str_rtx)->code) != SUBREG)
  return false;

/* If the bit field covers the whole REG/MEM, store_field
   will likely generate better code.  */
if (bitsize >= str_bitsize)
  return false;

/* We can't handle fields split across multiple entities.  */
if (bitpos + bitsize > str_bitsize)
  return false;

if (reverse ? !BYTES_BIG_ENDIAN0 : BYTES_BIG_ENDIAN0)
  bitpos = str_bitsize - bitpos - bitsize;

switch (code)
  {
  case PLUS_EXPR:
  case MINUS_EXPR:
    /* For now, just optimize the case of the topmost bitfield
where we don't need to do any masking and also
1 bit bitfields where xor can be used.
We might win by one instruction for the other bitfields
too if insv/extv instructions aren't used, so that
can be added later.  */
    if ((reverse || bitpos + bitsize != str_bitsize)
 && (bitsize != 1 || TREE_CODE (op1)((enum tree_code) (op1)->base.code) != INTEGER_CST))
break;

    value = expand_expr (op1, NULL_RTX(rtx) 0, str_mode, EXPAND_NORMAL);