/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/hard-reg-set.h

Bug Summary

File:	build/gcc/hard-reg-set.h
Warning:	line 200, column 5 The left expression of the compound assignment is an uninitialized value. The computed value will also be garbage

Annotated Source Code

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clang -cc1 -cc1 -triple x86_64-suse-linux -analyze -disable-free -clear-ast-before-backend -disable-llvm-verifier -discard-value-names -main-file-name shrink-wrap.cc -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=cplusplus -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -analyzer-config-compatibility-mode=true -mrelocation-model static -mframe-pointer=none -fmath-errno -ffp-contract=on -fno-rounding-math -mconstructor-aliases -funwind-tables=2 -target-cpu x86-64 -tune-cpu generic -debugger-tuning=gdb -fcoverage-compilation-dir=/buildworker/marxinbox-gcc-clang-static-analyzer/objdir/gcc -resource-dir /usr/lib64/clang/15.0.7 -D IN_GCC -D HAVE_CONFIG_H -I . -I . -I /buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc -I /buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/. -I /buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/../include -I /buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/../libcpp/include -I /buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/../libcody -I /buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/../libdecnumber -I /buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/../libdecnumber/bid -I ../libdecnumber -I /buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/../libbacktrace -internal-isystem /usr/bin/../lib64/gcc/x86_64-suse-linux/13/../../../../include/c++/13 -internal-isystem /usr/bin/../lib64/gcc/x86_64-suse-linux/13/../../../../include/c++/13/x86_64-suse-linux -internal-isystem /usr/bin/../lib64/gcc/x86_64-suse-linux/13/../../../../include/c++/13/backward -internal-isystem /usr/lib64/clang/15.0.7/include -internal-isystem /usr/local/include -internal-isystem /usr/bin/../lib64/gcc/x86_64-suse-linux/13/../../../../x86_64-suse-linux/include -internal-externc-isystem /include -internal-externc-isystem /usr/include -O2 -Wno-narrowing -Wwrite-strings -Wno-long-long -Wno-variadic-macros -Wno-overlength-strings -fdeprecated-macro -fdebug-compilation-dir=/buildworker/marxinbox-gcc-clang-static-analyzer/objdir/gcc -ferror-limit 19 -fno-rtti -fgnuc-version=4.2.1 -vectorize-loops -vectorize-slp -analyzer-output=plist-html -analyzer-config silence-checkers=core.NullDereference -faddrsig -D__GCC_HAVE_DWARF2_CFI_ASM=1 -o /buildworker/marxinbox-gcc-clang-static-analyzer/objdir/clang-static-analyzer/2023-03-27-141847-20772-1/report-4ve4ih.plist -x c++ /buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/shrink-wrap.cc

/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/shrink-wrap.cc

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1/* Shrink-wrapping related optimizations.
 Copyright (C) 1987-2023 Free Software Foundation, Inc.

4This file is part of GCC.

6GCC is free software; you can redistribute it and/or modify it under
7the terms of the GNU General Public License as published by the Free
8Software Foundation; either version 3, or (at your option) any later
9version.

11GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12WARRANTY; without even the implied warranty of MERCHANTABILITY or
13FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
14for more details.

16You should have received a copy of the GNU General Public License
17along with GCC; see the file COPYING3.  If not see
18<http://www.gnu.org/licenses/>.  */

20/* This file handles shrink-wrapping related optimizations.  */

22#include "config.h"
23#include "system.h"
24#include "coretypes.h"
25#include "backend.h"
26#include "target.h"
27#include "rtl.h"
28#include "tree.h"
29#include "cfghooks.h"
30#include "df.h"
31#include "memmodel.h"
32#include "tm_p.h"
33#include "regs.h"
34#include "insn-config.h"
35#include "emit-rtl.h"
36#include "output.h"
37#include "tree-pass.h"
38#include "cfgrtl.h"
39#include "cfgbuild.h"
40#include "bb-reorder.h"
41#include "shrink-wrap.h"
42#include "regcprop.h"
43#include "rtl-iter.h"
44#include "valtrack.h"
45#include "function-abi.h"
46#include "print-rtl.h"

48/* Return true if INSN requires the stack frame to be set up.
 PROLOGUE_USED contains the hard registers used in the function
 prologue.  SET_UP_BY_PROLOGUE is the set of registers we expect the
 prologue to set up for the function.  */
52bool
53requires_stack_frame_p (rtx_insn *insn, HARD_REG_SET prologue_used,
	HARD_REG_SET set_up_by_prologue)
55{
df_ref def, use;
HARD_REG_SET hardregs;
unsigned regno;

if (CALL_P (insn)(((enum rtx_code) (insn)->code) == CALL_INSN) && !FAKE_CALL_P (insn)(__extension__ ({ __typeof ((insn)) const _rtx = ((insn)); if
 (((enum rtx_code) (_rtx)->code) != CALL_INSN) rtl_check_failed_flag
 ("FAKE_CALL_P", _rtx, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/shrink-wrap.cc"
, 60, __FUNCTION__); _rtx; })->used))
  return !SIBLING_CALL_P (insn)(__extension__ ({ __typeof ((insn)) const _rtx = ((insn)); if
 (((enum rtx_code) (_rtx)->code) != CALL_INSN) rtl_check_failed_flag
 ("SIBLING_CALL_P", _rtx, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/shrink-wrap.cc"
, 61, __FUNCTION__); _rtx; })->jump);

/* We need a frame to get the unique CFA expected by the unwinder.  */
if (cfun(cfun + 0)->can_throw_non_call_exceptions && can_throw_internal (insn))
  return true;

CLEAR_HARD_REG_SET (hardregs);
FOR_EACH_INSN_DEF (def, insn)for (def = (((df->insns[(INSN_UID (insn))]))->defs); def
; def = ((def)->base.next_loc))
  {
    rtx dreg = DF_REF_REG (def)((def)->base.reg);

    if (!REG_P (dreg)(((enum rtx_code) (dreg)->code) == REG))
continue;

    add_to_hard_reg_set (&hardregs, GET_MODE (dreg)((machine_mode) (dreg)->mode), REGNO (dreg)(rhs_regno(dreg)));
  }
if (hard_reg_set_intersect_p (hardregs, prologue_used))
  return true;
hardregs &= ~crtl(&x_rtl)->abi->full_reg_clobbers ();
for (regno = 0; regno < FIRST_PSEUDO_REGISTER76; regno++)
  if (TEST_HARD_REG_BIT (hardregs, regno)
&& df_regs_ever_live_p (regno))
    return true;

FOR_EACH_INSN_USE (use, insn)for (use = (((df->insns[(INSN_UID (insn))]))->uses); use
; use = ((use)->base.next_loc))
  {
    rtx reg = DF_REF_REG (use)((use)->base.reg);

    if (!REG_P (reg)(((enum rtx_code) (reg)->code) == REG))
continue;

    add_to_hard_reg_set (&hardregs, GET_MODE (reg)((machine_mode) (reg)->mode),
	   REGNO (reg)(rhs_regno(reg)));
  }
if (hard_reg_set_intersect_p (hardregs, set_up_by_prologue))
  return true;

return false;
99}

101/* See whether there has a single live edge from BB, which dest uses
 [REGNO, END_REGNO).  Return the live edge if its dest bb has
 one or two predecessors.  Otherwise return NULL.  */

105static edge
106live_edge_for_reg (basic_block bb, int regno, int end_regno)
107{
edge e, live_edge;
edge_iterator ei;
bitmap live;
int i;

live_edge = NULLnullptr;
FOR_EACH_EDGE (e, ei, bb->succs)for ((ei) = ei_start_1 (&((bb->succs))); ei_cond ((ei)
, &(e)); ei_next (&(ei)))
  {
    live = df_get_live_in (e->dest);
    for (i = regno; i < end_regno; i++)
if (REGNO_REG_SET_P (live, i)bitmap_bit_p (live, i))
 {
   if (live_edge && live_edge != e)
     return NULLnullptr;
   live_edge = e;
 }
  }

/* We can sometimes encounter dead code.  Don't try to move it
   into the exit block.  */
if (!live_edge || live_edge->dest == EXIT_BLOCK_PTR_FOR_FN (cfun)(((cfun + 0))->cfg->x_exit_block_ptr))
  return NULLnullptr;

/* Reject targets of abnormal edges.  This is needed for correctness
   on ports like Alpha and MIPS, whose pic_offset_table_rtx can die on
   exception edges even though it is generally treated as call-saved
   for the majority of the compilation.  Moving across abnormal edges
   isn't going to be interesting for shrink-wrap usage anyway.  */
if (live_edge->flags & EDGE_ABNORMAL)
  return NULLnullptr;

/* When live_edge->dest->preds == 2, we can create a new block on
   the edge to make it meet the requirement.  */
if (EDGE_COUNT (live_edge->dest->preds)vec_safe_length (live_edge->dest->preds) > 2)
  return NULLnullptr;

return live_edge;
145}

147/* Try to move INSN from BB to a successor.  Return true on success.
 USES and DEFS are the set of registers that are used and defined
 after INSN in BB.  SPLIT_P indicates whether a live edge from BB
 is splitted or not.  */

152static bool
153move_insn_for_shrink_wrap (basic_block bb, rtx_insn *insn,
	   const_hard_reg_set uses,
	   const_hard_reg_set defs,
	   bool *split_p,
	   struct dead_debug_local *debug)
158{
rtx set, src, dest;
bitmap live_out, live_in, bb_uses = NULLnullptr, bb_defs = NULLnullptr;
unsigned int i, dregno, end_dregno;
unsigned int sregno = FIRST_PSEUDO_REGISTER76;
unsigned int end_sregno = FIRST_PSEUDO_REGISTER76;
basic_block next_block;
edge live_edge;
rtx_insn *dinsn;
df_ref def;

/* Look for a simple register assignment.  We don't use single_set here
   because we can't deal with any CLOBBERs, USEs, or REG_UNUSED secondary
   destinations.  */
if (!INSN_P (insn)(((((enum rtx_code) (insn)->code) == INSN) || (((enum rtx_code
) (insn)->code) == JUMP_INSN) || (((enum rtx_code) (insn)->
code) == CALL_INSN)) || (((enum rtx_code) (insn)->code) ==
 DEBUG_INSN)))
  return false;
set = PATTERN (insn);
if (GET_CODE (set)((enum rtx_code) (set)->code) != SET)
  return false;
src = SET_SRC (set)(((set)->u.fld[1]).rt_rtx);
dest = SET_DEST (set)(((set)->u.fld[0]).rt_rtx);

/* For the destination, we want only a register.  Also disallow STACK
   or FRAME related adjustments.  They are likely part of the prologue,
   so keep them in the entry block.  */
if (!REG_P (dest)(((enum rtx_code) (dest)->code) == REG)
    || dest == stack_pointer_rtx((this_target_rtl->x_global_rtl)[GR_STACK_POINTER])
    || dest == frame_pointer_rtx((this_target_rtl->x_global_rtl)[GR_FRAME_POINTER])
    || dest == hard_frame_pointer_rtx((this_target_rtl->x_global_rtl)[GR_HARD_FRAME_POINTER]))
  return false;

/* For the source, we want one of:
    (1) A (non-overlapping) register
    (2) A constant,
    (3) An expression involving no more than one register.

   That last point comes from the code following, which was originally
   written to handle only register move operations, and still only handles
   a single source register when checking for overlaps.  Happily, the
   same checks can be applied to expressions like (plus reg const).  */

if (CONSTANT_P (src)((rtx_class[(int) (((enum rtx_code) (src)->code))]) == RTX_CONST_OBJ
))
  ;
else if (!REG_P (src)(((enum rtx_code) (src)->code) == REG))
  {
    rtx src_inner = NULL_RTX(rtx) 0;

    if (can_throw_internal (insn))
return false;

    subrtx_var_iterator::array_type array;
    FOR_EACH_SUBRTX_VAR (iter, array, src, ALL)for (subrtx_var_iterator iter (array, src, rtx_all_subrtx_bounds
); !iter.at_end (); iter.next ())
{
 rtx x = *iter;
 switch (GET_RTX_CLASS (GET_CODE (x))(rtx_class[(int) (((enum rtx_code) (x)->code))]))
   {
   case RTX_CONST_OBJ:
   case RTX_COMPARE:
   case RTX_COMM_COMPARE:
   case RTX_BIN_ARITH:
   case RTX_COMM_ARITH:
   case RTX_UNARY:
   case RTX_TERNARY:
     /* Constant or expression.  Continue.  */
     break;

   case RTX_OBJ:
   case RTX_EXTRA:
     switch (GET_CODE (x)((enum rtx_code) (x)->code))
{
case UNSPEC:
case SUBREG:
case STRICT_LOW_PART:
case PC:
case LO_SUM:
  /* Ok.  Continue.  */
  break;

case REG:
  /* Fail if we see a second inner register.  */
  if (src_inner != NULLnullptr)
    return false;
  src_inner = x;
  break;

default:
  return false;
}
     break;

   default:
     return false;
   }
}

    if (src_inner != NULLnullptr)
src = src_inner;
  }

/* Make sure that the source register isn't defined later in BB.  */
if (REG_P (src)(((enum rtx_code) (src)->code) == REG))
  {
    sregno = REGNO (src)(rhs_regno(src));
    end_sregno = END_REGNO (src);
    if (overlaps_hard_reg_set_p (defs, GET_MODE (src)((machine_mode) (src)->mode), sregno))
return false;
  }

/* Make sure that the destination register isn't referenced later in BB.  */
dregno = REGNO (dest)(rhs_regno(dest));
end_dregno = END_REGNO (dest);
if (overlaps_hard_reg_set_p (uses, GET_MODE (dest)((machine_mode) (dest)->mode), dregno)
    || overlaps_hard_reg_set_p (defs, GET_MODE (dest)((machine_mode) (dest)->mode), dregno))
  return false;

/* See whether there is a successor block to which we could move INSN.  */
live_edge = live_edge_for_reg (bb, dregno, end_dregno);
if (!live_edge)
  return false;

next_block = live_edge->dest;
/* Create a new basic block on the edge.  */
if (EDGE_COUNT (next_block->preds)vec_safe_length (next_block->preds) == 2)
  {
    /* split_edge for a block with only one successor is meaningless.  */
    if (EDGE_COUNT (bb->succs)vec_safe_length (bb->succs) == 1)
return false;

    /* If DF_LIVE doesn't exist, i.e. at -O1, just give up.  */
    if (!df_live(df->problems_by_index[DF_LIVE]))
return false;

    basic_block old_dest = live_edge->dest;
    next_block = split_edge (live_edge);

    /* We create a new basic block.  Call df_grow_bb_info to make sure
all data structures are allocated.  */
    df_grow_bb_info (df_live(df->problems_by_index[DF_LIVE]));

    bitmap_and (df_get_live_in (next_block), df_get_live_out (bb),
  df_get_live_in (old_dest));
    df_set_bb_dirty (next_block);

    /* We should not split more than once for a function.  */
    if (*split_p)
return false;

    *split_p = true;
  }

/* At this point we are committed to moving INSN, but let's try to
   move it as far as we can.  */
do
  {
    if (MAY_HAVE_DEBUG_BIND_INSNSglobal_options.x_flag_var_tracking_assignments)
{
 FOR_BB_INSNS_REVERSE (bb, dinsn)for ((dinsn) = (bb)->il.x.rtl->end_; (dinsn) &&
 (dinsn) != PREV_INSN ((bb)->il.x.head_); (dinsn) = PREV_INSN
 (dinsn))
   if (DEBUG_BIND_INSN_P (dinsn)((((enum rtx_code) (dinsn)->code) == DEBUG_INSN) &&
 (((enum rtx_code) (PATTERN (dinsn))->code) == VAR_LOCATION
)))
     {
df_ref use;
FOR_EACH_INSN_USE (use, dinsn)for (use = (((df->insns[(INSN_UID (dinsn))]))->uses); use
; use = ((use)->base.next_loc))
  if (refers_to_regno_p (dregno, end_dregno,
			 DF_REF_REG (use)((use)->base.reg), (rtx *) NULLnullptr))
    dead_debug_add (debug, use, DF_REF_REGNO (use)((use)->base.regno));
     }
   else if (dinsn == insn)
     break;
}
    live_out = df_get_live_out (bb);
    live_in = df_get_live_in (next_block);
    bb = next_block;

    /* Check whether BB uses DEST or clobbers DEST.  We need to add
INSN to BB if so.  Either way, DEST is no longer live on entry,
except for any part that overlaps SRC (next loop).  */
    if (!*split_p)
{
 bb_uses = &DF_LR_BB_INFO (bb)(df_lr_get_bb_info ((bb)->index))->use;
 bb_defs = &DF_LR_BB_INFO (bb)(df_lr_get_bb_info ((bb)->index))->def;
}
    if (df_live(df->problems_by_index[DF_LIVE]))
{
 for (i = dregno; i < end_dregno; i++)
   {
     if (*split_p
  || REGNO_REG_SET_P (bb_uses, i)bitmap_bit_p (bb_uses, i)
  || REGNO_REG_SET_P (bb_defs, i)bitmap_bit_p (bb_defs, i)
  || REGNO_REG_SET_P (&DF_LIVE_BB_INFO (bb)->gen, i)bitmap_bit_p (&(df_live_get_bb_info ((bb)->index))->
gen, i))
next_block = NULLnullptr;
     CLEAR_REGNO_REG_SET (live_out, i)bitmap_clear_bit (live_out, i);
     CLEAR_REGNO_REG_SET (live_in, i)bitmap_clear_bit (live_in, i);
   }

 /* Check whether BB clobbers SRC.  We need to add INSN to BB if so.
    Either way, SRC is now live on entry.  */
 for (i = sregno; i < end_sregno; i++)
   {
     if (*split_p
  || REGNO_REG_SET_P (bb_defs, i)bitmap_bit_p (bb_defs, i)
  || REGNO_REG_SET_P (&DF_LIVE_BB_INFO (bb)->gen, i)bitmap_bit_p (&(df_live_get_bb_info ((bb)->index))->
gen, i))
next_block = NULLnullptr;
     SET_REGNO_REG_SET (live_out, i)bitmap_set_bit (live_out, i);
     SET_REGNO_REG_SET (live_in, i)bitmap_set_bit (live_in, i);
   }
}
    else
{
 /* DF_LR_BB_INFO (bb)->def does not comprise the DF_REF_PARTIAL and
    DF_REF_CONDITIONAL defs.  So if DF_LIVE doesn't exist, i.e.
    at -O1, just give up searching NEXT_BLOCK.  */
 next_block = NULLnullptr;
 for (i = dregno; i < end_dregno; i++)
   {
     CLEAR_REGNO_REG_SET (live_out, i)bitmap_clear_bit (live_out, i);
     CLEAR_REGNO_REG_SET (live_in, i)bitmap_clear_bit (live_in, i);
   }

 for (i = sregno; i < end_sregno; i++)
   {
     SET_REGNO_REG_SET (live_out, i)bitmap_set_bit (live_out, i);
     SET_REGNO_REG_SET (live_in, i)bitmap_set_bit (live_in, i);
   }
}

    /* If we don't need to add the move to BB, look for a single
successor block.  */
    if (next_block)
{
 live_edge = live_edge_for_reg (next_block, dregno, end_dregno);
 if (!live_edge || EDGE_COUNT (live_edge->dest->preds)vec_safe_length (live_edge->dest->preds) > 1)
   break;
 next_block = live_edge->dest;
}
  }
while (next_block);

/* For the new created basic block, there is no dataflow info at all.
   So skip the following dataflow update and check.  */
if (!(*split_p))
  {
    /* BB now defines DEST.  It only uses the parts of DEST that overlap SRC
(next loop).  */
    for (i = dregno; i < end_dregno; i++)
{
 CLEAR_REGNO_REG_SET (bb_uses, i)bitmap_clear_bit (bb_uses, i);
 SET_REGNO_REG_SET (bb_defs, i)bitmap_set_bit (bb_defs, i);
}

    /* BB now uses SRC.  */
    for (i = sregno; i < end_sregno; i++)
SET_REGNO_REG_SET (bb_uses, i)bitmap_set_bit (bb_uses, i);
  }

/* Insert debug temps for dead REGs used in subsequent debug insns.  */
if (debug->used && !bitmap_empty_p (debug->used))
  FOR_EACH_INSN_DEF (def, insn)for (def = (((df->insns[(INSN_UID (insn))]))->defs); def
; def = ((def)->base.next_loc))
    dead_debug_insert_temp (debug, DF_REF_REGNO (def)((def)->base.regno), insn,
	      DEBUG_TEMP_BEFORE_WITH_VALUE);

rtx_insn *insn_copy = emit_insn_after (PATTERN (insn), bb_note (bb));
/* Update the LABEL_NUSES count on any referenced labels. The ideal
   solution here would be to actually move the instruction instead
   of copying/deleting it as this loses some notations on the
   insn.  */
mark_jump_label (PATTERN (insn), insn_copy, 0);
delete_insn (insn);
return true;
425}

427/* Look for register copies in the first block of the function, and move
 them down into successor blocks if the register is used only on one
 path.  This exposes more opportunities for shrink-wrapping.  These
 kinds of sets often occur when incoming argument registers are moved
 to call-saved registers because their values are live across one or
 more calls during the function.  */

434static void
435prepare_shrink_wrap (basic_block entry_block)
436{
rtx_insn *insn, *curr;
rtx x;
HARD_REG_SET uses, defs;
df_ref def, use;
bool split_p = false;
unsigned int i;
struct dead_debug_local debug;

if (JUMP_P (BB_END (entry_block))(((enum rtx_code) ((entry_block)->il.x.rtl->end_)->code
) == JUMP_INSN))
  {
    /* To have more shrink-wrapping opportunities, prepare_shrink_wrap tries
to sink the copies from parameter to callee saved register out of
entry block.  copyprop_hardreg_forward_bb_without_debug_insn is called
to release some dependences.  */
    copyprop_hardreg_forward_bb_without_debug_insn (entry_block);
  }

dead_debug_local_init (&debug, NULLnullptr, NULLnullptr);
CLEAR_HARD_REG_SET (uses);
CLEAR_HARD_REG_SET (defs);

FOR_BB_INSNS_REVERSE_SAFE (entry_block, insn, curr)for ((insn) = (entry_block)->il.x.rtl->end_,(curr) = (insn
) ? PREV_INSN ((insn)) : nullptr; (insn) && (insn) !=
 PREV_INSN ((entry_block)->il.x.head_); (insn) = (curr), (
curr) = (insn) ? PREV_INSN ((insn)) : nullptr)
  if (NONDEBUG_INSN_P (insn)((((enum rtx_code) (insn)->code) == INSN) || (((enum rtx_code
) (insn)->code) == JUMP_INSN) || (((enum rtx_code) (insn)->
code) == CALL_INSN))
&& !move_insn_for_shrink_wrap (entry_block, insn, uses, defs,
		       &split_p, &debug))
    {
/* Add all defined registers to DEFs.  */
FOR_EACH_INSN_DEF (def, insn)for (def = (((df->insns[(INSN_UID (insn))]))->defs); def
; def = ((def)->base.next_loc))
 {
   x = DF_REF_REG (def)((def)->base.reg);
   if (REG_P (x)(((enum rtx_code) (x)->code) == REG) && HARD_REGISTER_P (x)((((rhs_regno(x))) < 76)))
     for (i = REGNO (x)(rhs_regno(x)); i < END_REGNO (x); i++)
SET_HARD_REG_BIT (defs, i);
 }

/* Add all used registers to USESs.  */
FOR_EACH_INSN_USE (use, insn)for (use = (((df->insns[(INSN_UID (insn))]))->uses); use
; use = ((use)->base.next_loc))
 {
   x = DF_REF_REG (use)((use)->base.reg);
   if (REG_P (x)(((enum rtx_code) (x)->code) == REG) && HARD_REGISTER_P (x)((((rhs_regno(x))) < 76)))
     for (i = REGNO (x)(rhs_regno(x)); i < END_REGNO (x); i++)
SET_HARD_REG_BIT (uses, i);
 }
    }

dead_debug_local_finish (&debug, NULLnullptr);
483}

485/* Return whether basic block PRO can get the prologue.  It cannot if it
 has incoming complex edges that need a prologue inserted (we make a new
 block for the prologue, so those edges would need to be redirected, which
 does not work).  It also cannot if there exist registers live on entry
 to PRO that are clobbered by the prologue.  */

491static bool
492can_get_prologue (basic_block pro, HARD_REG_SET prologue_clobbered)
493{
edge e;
edge_iterator ei;
FOR_EACH_EDGE (e, ei, pro->preds)for ((ei) = ei_start_1 (&((pro->preds))); ei_cond ((ei
), &(e)); ei_next (&(ei)))
  if (e->flags & EDGE_COMPLEX(EDGE_ABNORMAL | EDGE_ABNORMAL_CALL | EDGE_EH | EDGE_PRESERVE
)
&& !dominated_by_p (CDI_DOMINATORS, e->src, pro))
    return false;

HARD_REG_SET live;
REG_SET_TO_HARD_REG_SET (live, df_get_live_in (pro))do { CLEAR_HARD_REG_SET (live); reg_set_to_hard_reg_set (&
live, df_get_live_in (pro)); } while (0);
if (hard_reg_set_intersect_p (live, prologue_clobbered))
  return false;

return true;
507}

509/* Return whether we can duplicate basic block BB for shrink wrapping.  We
 cannot if the block cannot be duplicated at all, or if any of its incoming
 edges are complex and come from a block that does not require a prologue
 (we cannot redirect such edges), or if the block is too big to copy.
 PRO is the basic block before which we would put the prologue, MAX_SIZE is
 the maximum size block we allow to be copied.  */

516static bool
517can_dup_for_shrink_wrapping (basic_block bb, basic_block pro, unsigned max_size)
518{
if (!can_duplicate_block_p (bb))
  return false;

edge e;
edge_iterator ei;
FOR_EACH_EDGE (e, ei, bb->preds)for ((ei) = ei_start_1 (&((bb->preds))); ei_cond ((ei)
, &(e)); ei_next (&(ei)))
  if (e->flags & (EDGE_COMPLEX(EDGE_ABNORMAL | EDGE_ABNORMAL_CALL | EDGE_EH | EDGE_PRESERVE
) | EDGE_CROSSING)
&& !dominated_by_p (CDI_DOMINATORS, e->src, pro))
    return false;

unsigned size = 0;

rtx_insn *insn;
FOR_BB_INSNS (bb, insn)for ((insn) = (bb)->il.x.head_; (insn) && (insn) !=
 NEXT_INSN ((bb)->il.x.rtl->end_); (insn) = NEXT_INSN (
insn))
  if (NONDEBUG_INSN_P (insn)((((enum rtx_code) (insn)->code) == INSN) || (((enum rtx_code
) (insn)->code) == JUMP_INSN) || (((enum rtx_code) (insn)->
code) == CALL_INSN)))
    {
size += get_attr_min_length (insn);
if (size > max_size)
 return false;
    }

return true;
541}

543/* Do whatever needs to be done for exits that run without prologue.
 Sibcalls need nothing done.  Normal exits get a simple_return inserted.  */

546static void
547handle_simple_exit (edge e)
548{

if (e->flags & EDGE_SIBCALL)
  {
    /* Tell function.cc to take no further action on this edge.  */
    e->flags |= EDGE_IGNORE;

    e->flags &= ~EDGE_FALLTHRU;
    emit_barrier_after_bb (e->src);
    return;
  }

/* If the basic block the edge comes from has multiple successors,
   split the edge.  */
if (EDGE_COUNT (e->src->succs)vec_safe_length (e->src->succs) > 1)
  {
    basic_block old_bb = e->src;
    rtx_insn *end = BB_END (old_bb)(old_bb)->il.x.rtl->end_;
    rtx_note *note = emit_note_after (NOTE_INSN_DELETED, end);
    basic_block new_bb = create_basic_block (note, note, old_bb);
    BB_COPY_PARTITION (new_bb, old_bb)do { basic_block bb_ = (new_bb); bb_->flags = ((bb_->flags
 & ~(BB_HOT_PARTITION|BB_COLD_PARTITION)) | (((old_bb)->
flags & (BB_HOT_PARTITION|BB_COLD_PARTITION)))); } while (
0);
    BB_END (old_bb)(old_bb)->il.x.rtl->end_ = end;

    redirect_edge_succ (e, new_bb);
    new_bb->count = e->count ();
    e->flags |= EDGE_FALLTHRU;

    e = make_single_succ_edge (new_bb, EXIT_BLOCK_PTR_FOR_FN (cfun)(((cfun + 0))->cfg->x_exit_block_ptr), 0);
  }

e->flags &= ~EDGE_FALLTHRU;
rtx_jump_insn *ret = emit_jump_insn_after (targetm.gen_simple_return (),
			     BB_END (e->src)(e->src)->il.x.rtl->end_);
JUMP_LABEL (ret)(((ret)->u.fld[7]).rt_rtx) = simple_return_rtx;
emit_barrier_after_bb (e->src);

if (dump_file)
  fprintf (dump_file, "Made simple_return with UID %d in bb %d\n",
    INSN_UID (ret), e->src->index);
587}

589/* Try to perform a kind of shrink-wrapping, making sure the
 prologue/epilogue is emitted only around those parts of the
 function that require it.

 There will be exactly one prologue, and it will be executed either
 zero or one time, on any path.  Depending on where the prologue is
 placed, some of the basic blocks can be reached via both paths with
 and without a prologue.  Such blocks will be duplicated here, and the
 edges changed to match.

 Paths that go to the exit without going through the prologue will use
 a simple_return instead of the epilogue.  We maximize the number of
 those, making sure to only duplicate blocks that can be duplicated.
 If the prologue can then still be placed in multiple locations, we
 place it as early as possible.

 An example, where we duplicate blocks with control flow (legend:
 _B_egin, _R_eturn and _S_imple_return; edges without arrowhead should
 be taken to point down or to the right, to simplify the diagram; here,
 block 3 needs a prologue, the rest does not):


     B                 B
     |                 |
     2                 2
     |\                |\
     | 3    becomes    | 3
     |/                |  \
     4                 7   4
     |\                |\  |\
     | 5               | 8 | 5
     |/                |/  |/
     6                 9   6
     |                 |   |
     R                 S   R


 (bb 4 is duplicated to 7, and so on; the prologue is inserted on the
 edge 2->3).

 Another example, where part of a loop is duplicated (again, bb 3 is
 the only block that needs a prologue):


     B   3<--              B       ->3<--
     |   |   |             |      |  |   |
     |   v   |   becomes   |      |  v   |
     2---4---              2---5--   4---
         |                     |     |
         R                     S     R


 (bb 4 is duplicated to 5; the prologue is inserted on the edge 5->3).

 ENTRY_EDGE is the edge where the prologue will be placed, possibly
 changed by this function.  PROLOGUE_SEQ is the prologue we will insert.  */

646void
647try_shrink_wrapping (edge *entry_edge, rtx_insn *prologue_seq)
648{
/* If we cannot shrink-wrap, are told not to shrink-wrap, or it makes
   no sense to shrink-wrap: then do not shrink-wrap!  */

if (!SHRINK_WRAPPING_ENABLED(global_options.x_flag_shrink_wrap && targetm.have_simple_return
 ()))
1
Assuming field 'x_flag_shrink_wrap' is not equal to 0→
2
←
Assuming the condition is false→
  return;

if (crtl(&x_rtl)->profile && !targetm.profile_before_prologue ())
3
←
Assuming field 'profile' is false→
  return;

if (crtl(&x_rtl)->calls_eh_return)
4
←
Assuming field 'calls_eh_return' is false→
5
←
Taking false branch→
  return;

bool empty_prologue = true;
for (rtx_insn *insn = prologue_seq; insn; insn = NEXT_INSN (insn))
  if (!(NOTE_P (insn)(((enum rtx_code) (insn)->code) == NOTE) && NOTE_KIND (insn)(((insn)->u.fld[4]).rt_int) == NOTE_INSN_PROLOGUE_END))
6
←
Loop condition is true.  Entering loop body→
7
←
Assuming field 'code' is not equal to NOTE→
8
←
Taking true branch→
    {
empty_prologue = false;
break;
    }
if (empty_prologue9.1
'empty_prologue' is false
1
'empty_prologue' is false
1
'empty_prologue' is false
)
9
←
 Execution continues on line 668→
10
←
Taking false branch→
  return;

/* Move some code down to expose more shrink-wrapping opportunities.  */

basic_block entry = (*entry_edge)->dest;
prepare_shrink_wrap (entry);

if (dump_file)
11
←
Assuming 'dump_file' is null→
12
←
Taking false branch→
  fprintf (dump_file, "Attempting shrink-wrapping optimization.\n");

/* Compute the registers set and used in the prologue.  */

HARD_REG_SET prologue_clobbered, prologue_used;
CLEAR_HARD_REG_SET (prologue_clobbered);
CLEAR_HARD_REG_SET (prologue_used);
for (rtx_insn *insn = prologue_seq; insn; insn = NEXT_INSN (insn))
18
←
Loop condition is false. Execution continues on line 694→
  if (NONDEBUG_INSN_P (insn)((((enum rtx_code) (insn)->code) == INSN) || (((enum rtx_code
) (insn)->code) == JUMP_INSN) || (((enum rtx_code) (insn)->
code) == CALL_INSN)))
13
←
Loop condition is true.  Entering loop body→
14
←
Assuming field 'code' is not equal to INSN→
15
←
Assuming field 'code' is not equal to JUMP_INSN→
16
←
Assuming field 'code' is not equal to CALL_INSN→
17
←
Taking false branch→
    {
HARD_REG_SET this_used;
CLEAR_HARD_REG_SET (this_used);
note_uses (&PATTERN (insn), record_hard_reg_uses, &this_used);
this_used &= ~prologue_clobbered;
prologue_used |= this_used;
note_stores (insn, record_hard_reg_sets, &prologue_clobbered);
    }
CLEAR_HARD_REG_BIT (prologue_clobbered, STACK_POINTER_REGNUM7);
if (frame_pointer_needed((&x_rtl)->frame_pointer_needed))
19
←
Assuming field 'frame_pointer_needed' is false→
20
←
Taking false branch→
  CLEAR_HARD_REG_BIT (prologue_clobbered, HARD_FRAME_POINTER_REGNUM6);

/* Find out what registers are set up by the prologue; any use of these
   cannot happen before the prologue.  */

struct hard_reg_set_container set_up_by_prologue;
CLEAR_HARD_REG_SET (set_up_by_prologue.set);
21
←
Calling 'CLEAR_HARD_REG_SET'→
25
←
Returning from 'CLEAR_HARD_REG_SET'→
add_to_hard_reg_set (&set_up_by_prologue.set, Pmode(global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode (
(scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode))), STACK_POINTER_REGNUM7);
26
←
Assuming field 'x_ix86_pmode' is equal to PMODE_DI→
27
←
'?' condition is true→
28
←
Calling 'add_to_hard_reg_set'→
33
←
Returning from 'add_to_hard_reg_set'→
add_to_hard_reg_set (&set_up_by_prologue.set, Pmode(global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode (
(scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode))), ARG_POINTER_REGNUM16);
34
←
'?' condition is true→
35
←
Calling 'add_to_hard_reg_set'→
40
←
Returning from 'add_to_hard_reg_set'→
if (frame_pointer_needed((&x_rtl)->frame_pointer_needed))
  add_to_hard_reg_set (&set_up_by_prologue.set, Pmode(global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode (
(scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode))),
	 HARD_FRAME_POINTER_REGNUM6);
if (pic_offset_table_rtx(this_target_rtl->x_pic_offset_table_rtx) 
41
←
Assuming field 'x_pic_offset_table_rtx' is non-null→
47
←
Taking true branch→
    && (unsigned) PIC_OFFSET_TABLE_REGNUM(ix86_use_pseudo_pic_reg () ? ((this_target_rtl->x_pic_offset_table_rtx
) ? (~(unsigned int) 0) : (((global_options.x_ix86_isa_flags &
 (1UL << 1)) != 0) ? 43 : 3)) : (~(unsigned int) 0)) != INVALID_REGNUM(~(unsigned int) 0))
42
←
Assuming the condition is true→
43
←
'?' condition is true→
44
←
Assuming field 'x_pic_offset_table_rtx' is null→
45
←
Assuming the condition is false→
46
←
'?' condition is false→
  add_to_hard_reg_set (&set_up_by_prologue.set, Pmode(global_options.x_ix86_pmode == PMODE_DI ? (scalar_int_mode (
(scalar_int_mode::from_int) E_DImode)) : (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode))),
48
←
Assuming field 'x_ix86_pmode' is not equal to PMODE_DI→
49
←
'?' condition is false→
52
←
Calling 'add_to_hard_reg_set'→
	 PIC_OFFSET_TABLE_REGNUM(ix86_use_pseudo_pic_reg () ? ((this_target_rtl->x_pic_offset_table_rtx
) ? (~(unsigned int) 0) : (((global_options.x_ix86_isa_flags &
 (1UL << 1)) != 0) ? 43 : 3)) : (~(unsigned int) 0)));
50
←
Assuming the condition is false→
51
←
'?' condition is false→
if (crtl(&x_rtl)->drap_reg)
  add_to_hard_reg_set (&set_up_by_prologue.set,
	 GET_MODE (crtl->drap_reg)((machine_mode) ((&x_rtl)->drap_reg)->mode),
	 REGNO (crtl->drap_reg)(rhs_regno((&x_rtl)->drap_reg)));
if (targetm.set_up_by_prologue)
  targetm.set_up_by_prologue (&set_up_by_prologue);

/* We will insert the prologue before the basic block PRO.  PRO should
   dominate all basic blocks that need the prologue to be executed
   before them.  First, make PRO the "tightest wrap" possible.  */

calculate_dominance_info (CDI_DOMINATORS);

basic_block pro = 0;

basic_block bb;
edge e;
edge_iterator ei;
FOR_EACH_BB_FN (bb, cfun)for (bb = ((cfun + 0))->cfg->x_entry_block_ptr->next_bb
; bb != ((cfun + 0))->cfg->x_exit_block_ptr; bb = bb->
next_bb)
  {
    rtx_insn *insn;
    FOR_BB_INSNS (bb, insn)for ((insn) = (bb)->il.x.head_; (insn) && (insn) !=
 NEXT_INSN ((bb)->il.x.rtl->end_); (insn) = NEXT_INSN (
insn))
if (NONDEBUG_INSN_P (insn)((((enum rtx_code) (insn)->code) == INSN) || (((enum rtx_code
) (insn)->code) == JUMP_INSN) || (((enum rtx_code) (insn)->
code) == CALL_INSN))
   && requires_stack_frame_p (insn, prologue_used,
		       set_up_by_prologue.set))
 {
   if (dump_file)
     {
fprintf (dump_file, "Block %d needs prologue due to insn %d:\n",
	 bb->index, INSN_UID (insn));
print_rtl_single (dump_file, insn);
     }
   pro = nearest_common_dominator (CDI_DOMINATORS, pro, bb);
   break;
 }
  }

/* If nothing needs a prologue, just put it at the start.  This really
   shouldn't happen, but we cannot fix it here.  */

if (pro == 0)
  {
    if (dump_file)
fprintf(dump_file, "Nothing needs a prologue, but it isn't empty; "
	   "putting it at the start.\n");
    pro = entry;
  }

if (dump_file)
  fprintf (dump_file, "After wrapping required blocks, PRO is now %d\n",
    pro->index);

/* Now see if we can put the prologue at the start of PRO.  Putting it
   there might require duplicating a block that cannot be duplicated,
   or in some cases we cannot insert the prologue there at all.  If PRO
   wont't do, try again with the immediate dominator of PRO, and so on.

   The blocks that need duplicating are those reachable from PRO but
   not dominated by it.  We keep in BB_WITH a bitmap of the blocks
   reachable from PRO that we already found, and in VEC a stack of
   those we still need to consider (to find successors).  */

auto_bitmap bb_with;
bitmap_set_bit (bb_with, pro->index);

vec<basic_block> vec;
vec.create (n_basic_blocks_for_fn (cfun)(((cfun + 0))->cfg->x_n_basic_blocks));
vec.quick_push (pro);

unsigned max_grow_size = get_uncond_jump_length ();
max_grow_size *= param_max_grow_copy_bb_insnsglobal_options.x_param_max_grow_copy_bb_insns;

basic_block checked_pro = NULLnullptr;

while (pro != entry)
  {
    if (pro != checked_pro)
{
 while (pro != entry && !can_get_prologue (pro, prologue_clobbered))
   {
     pro = get_immediate_dominator (CDI_DOMINATORS, pro);

     if (bitmap_set_bit (bb_with, pro->index))
vec.quick_push (pro);
   }
 checked_pro = pro;
}

    if (vec.is_empty ())
break;

    basic_block bb = vec.pop ();
    if (!can_dup_for_shrink_wrapping (bb, pro, max_grow_size))
while (!dominated_by_p (CDI_DOMINATORS, bb, pro))
 {
   gcc_assert (pro != entry)((void)(!(pro != entry) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/shrink-wrap.cc"
, 807, __FUNCTION__), 0 : 0));

   pro = get_immediate_dominator (CDI_DOMINATORS, pro);

   if (bitmap_set_bit (bb_with, pro->index))
     vec.quick_push (pro);
 }

    FOR_EACH_EDGE (e, ei, bb->succs)for ((ei) = ei_start_1 (&((bb->succs))); ei_cond ((ei)
, &(e)); ei_next (&(ei)))
if (e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun)(((cfun + 0))->cfg->x_exit_block_ptr)
   && bitmap_set_bit (bb_with, e->dest->index))
 vec.quick_push (e->dest);
  }

if (dump_file)
  fprintf (dump_file, "Avoiding non-duplicatable blocks, PRO is now %d\n",
    pro->index);

/* If we can move PRO back without having to duplicate more blocks, do so.
   We do this because putting the prologue earlier is better for scheduling.

   We can move back to a block PRE if every path from PRE will eventually
   need a prologue, that is, PRO is a post-dominator of PRE.  PRE needs
   to dominate every block reachable from itself.  We keep in BB_TMP a
   bitmap of the blocks reachable from PRE that we already found, and in
   VEC a stack of those we still need to consider.

   Any block reachable from PRE is also reachable from all predecessors
   of PRE, so if we find we need to move PRE back further we can leave
   everything not considered so far on the stack.  Any block dominated
   by PRE is also dominated by all other dominators of PRE, so anything
   found good for some PRE does not need to be reconsidered later.

   We don't need to update BB_WITH because none of the new blocks found
   can jump to a block that does not need the prologue.  */

if (pro != entry)
  {
    calculate_dominance_info (CDI_POST_DOMINATORS);

    auto_bitmap bb_tmp;
    bitmap_copy (bb_tmp, bb_with);
    basic_block last_ok = pro;
    vec.truncate (0);

    while (pro != entry)
{
 basic_block pre = get_immediate_dominator (CDI_DOMINATORS, pro);
 if (!dominated_by_p (CDI_POST_DOMINATORS, pre, pro))
   break;

 if (bitmap_set_bit (bb_tmp, pre->index))
   vec.quick_push (pre);

 bool ok = true;
 while (!vec.is_empty ())
   {
     if (!dominated_by_p (CDI_DOMINATORS, vec.last (), pre))
{
  ok = false;
  break;
}

     basic_block bb = vec.pop ();
     FOR_EACH_EDGE (e, ei, bb->succs)for ((ei) = ei_start_1 (&((bb->succs))); ei_cond ((ei)
, &(e)); ei_next (&(ei)))
if (bitmap_set_bit (bb_tmp, e->dest->index))
  vec.quick_push (e->dest);
   }

 if (ok && can_get_prologue (pre, prologue_clobbered))
   last_ok = pre;

 pro = pre;
}

    pro = last_ok;

    free_dominance_info (CDI_POST_DOMINATORS);
  }

vec.release ();

if (dump_file)
  fprintf (dump_file, "Bumping back to anticipatable blocks, PRO is now %d\n",
    pro->index);

if (pro == entry)
  {
    free_dominance_info (CDI_DOMINATORS);
    return;
  }

/* Compute what fraction of the frequency and count of the blocks that run
   both with and without prologue are for running with prologue.  This gives
   the correct answer for reducible flow graphs; for irreducible flow graphs
   our profile is messed up beyond repair anyway.  */

profile_count num = profile_count::zero ();
profile_count den = profile_count::zero ();

FOR_EACH_EDGE (e, ei, pro->preds)for ((ei) = ei_start_1 (&((pro->preds))); ei_cond ((ei
), &(e)); ei_next (&(ei)))
  if (!dominated_by_p (CDI_DOMINATORS, e->src, pro))
    {
if (e->count ().initialized_p ())
 num += e->count ();
if (e->src->count.initialized_p ())
 den += e->src->count;
    }

/* All is okay, so do it.  */

crtl(&x_rtl)->shrink_wrapped = true;
if (dump_file)
  fprintf (dump_file, "Performing shrink-wrapping.\n");

/* Copy the blocks that can run both with and without prologue.  The
   originals run with prologue, the copies without.  Store a pointer to
   the copy in the ->aux field of the original.  */

FOR_EACH_BB_FN (bb, cfun)for (bb = ((cfun + 0))->cfg->x_entry_block_ptr->next_bb
; bb != ((cfun + 0))->cfg->x_exit_block_ptr; bb = bb->
next_bb)
  if (bitmap_bit_p (bb_with, bb->index)
&& !dominated_by_p (CDI_DOMINATORS, bb, pro))
    {
basic_block dup = duplicate_block (bb, 0, 0);

bb->aux = dup;

if (JUMP_P (BB_END (dup))(((enum rtx_code) ((dup)->il.x.rtl->end_)->code) == JUMP_INSN
) && !any_condjump_p (BB_END (dup)(dup)->il.x.rtl->end_))
 emit_barrier_after_bb (dup);

if (EDGE_COUNT (dup->succs)vec_safe_length (dup->succs) == 0)
 emit_barrier_after_bb (dup);

if (dump_file)
 fprintf (dump_file, "Duplicated %d to %d\n", bb->index, dup->index);

if (num == profile_count::zero () || den.nonzero_p ())
 bb->count = bb->count.apply_scale (num, den);
dup->count -= bb->count;
    }

/* Now change the edges to point to the copies, where appropriate.  */

FOR_EACH_BB_FN (bb, cfun)for (bb = ((cfun + 0))->cfg->x_entry_block_ptr->next_bb
; bb != ((cfun + 0))->cfg->x_exit_block_ptr; bb = bb->
next_bb)
  if (!dominated_by_p (CDI_DOMINATORS, bb, pro))
    {
basic_block src = bb;
if (bitmap_bit_p (bb_with, bb->index))
 src = (basic_block) bb->aux;

FOR_EACH_EDGE (e, ei, src->succs)for ((ei) = ei_start_1 (&((src->succs))); ei_cond ((ei
), &(e)); ei_next (&(ei)))
 {
   if (e->dest == EXIT_BLOCK_PTR_FOR_FN (cfun)(((cfun + 0))->cfg->x_exit_block_ptr))
     continue;

   if (bitmap_bit_p (bb_with, e->dest->index)
&& !dominated_by_p (CDI_DOMINATORS, e->dest, pro))
     {
if (dump_file)
  fprintf (dump_file, "Redirecting edge %d->%d to %d\n",
	   e->src->index, e->dest->index,
	   ((basic_block) e->dest->aux)->index);
redirect_edge_and_branch_force (e, (basic_block) e->dest->aux);
     }
   else if (e->flags & EDGE_FALLTHRU
     && bitmap_bit_p (bb_with, bb->index))
     force_nonfallthru (e);
 }
    }

/* Also redirect the function entry edge if necessary.  */

FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs)for ((ei) = ei_start_1 (&(((((cfun + 0))->cfg->x_entry_block_ptr
)->succs))); ei_cond ((ei), &(e)); ei_next (&(ei))
)
  if (bitmap_bit_p (bb_with, e->dest->index)
&& !dominated_by_p (CDI_DOMINATORS, e->dest, pro))
    {
basic_block split_bb = split_edge (e);
e = single_succ_edge (split_bb);
redirect_edge_and_branch_force (e, (basic_block) e->dest->aux);
    }

/* Make a simple_return for those exits that run without prologue.  */

FOR_EACH_BB_REVERSE_FN (bb, cfun)for (bb = ((cfun + 0))->cfg->x_exit_block_ptr->prev_bb
; bb != ((cfun + 0))->cfg->x_entry_block_ptr; bb = bb->
prev_bb)
  if (!bitmap_bit_p (bb_with, bb->index))
    FOR_EACH_EDGE (e, ei, bb->succs)for ((ei) = ei_start_1 (&((bb->succs))); ei_cond ((ei)
, &(e)); ei_next (&(ei)))
if (e->dest == EXIT_BLOCK_PTR_FOR_FN (cfun)(((cfun + 0))->cfg->x_exit_block_ptr))
 handle_simple_exit (e);

/* Finally, we want a single edge to put the prologue on.  Make a new
   block before the PRO block; the edge beteen them is the edge we want.
   Then redirect those edges into PRO that come from blocks without the
   prologue, to point to the new block instead.  The new prologue block
   is put at the end of the insn chain.  */

basic_block new_bb = create_empty_bb (EXIT_BLOCK_PTR_FOR_FN (cfun)(((cfun + 0))->cfg->x_exit_block_ptr)->prev_bb);
BB_COPY_PARTITION (new_bb, pro)do { basic_block bb_ = (new_bb); bb_->flags = ((bb_->flags
 & ~(BB_HOT_PARTITION|BB_COLD_PARTITION)) | (((pro)->flags
 & (BB_HOT_PARTITION|BB_COLD_PARTITION)))); } while (0);
new_bb->count = profile_count::zero ();
if (dump_file)
  fprintf (dump_file, "Made prologue block %d\n", new_bb->index);

for (ei = ei_start (pro->preds)ei_start_1 (&(pro->preds)); (e = ei_safe_edge (ei)); )
  {
    if (bitmap_bit_p (bb_with, e->src->index)
 || dominated_by_p (CDI_DOMINATORS, e->src, pro))
{
 ei_next (&ei);
 continue;
}

    new_bb->count += e->count ();

    redirect_edge_and_branch_force (e, new_bb);
    if (dump_file)
fprintf (dump_file, "Redirected edge from %d\n", e->src->index);
  }

*entry_edge = make_single_succ_edge (new_bb, pro, EDGE_FALLTHRU);
force_nonfallthru (*entry_edge);

free_dominance_info (CDI_DOMINATORS);
1028}
1029
1030/* Separate shrink-wrapping

 Instead of putting all of the prologue and epilogue in one spot, we
 can put parts of it in places where those components are executed less
 frequently.  The following code does this, for prologue and epilogue
 components that can be put in more than one location, and where those
 components can be executed more than once (the epilogue component will
 always be executed before the prologue component is executed a second
 time).

 What exactly is a component is target-dependent.  The more usual
 components are simple saves/restores to/from the frame of callee-saved
 registers.  This code treats components abstractly (as an sbitmap),
 letting the target handle all details.

 Prologue components are placed in such a way that for every component
 the prologue is executed as infrequently as possible.  We do this by
 walking the dominator tree, comparing the cost of placing a prologue
 component before a block to the sum of costs determined for all subtrees
 of that block.

 From this placement, we then determine for each component all blocks
 where at least one of this block's dominators (including itself) will
 get a prologue inserted.  That then is how the components are placed.
 We could place the epilogue components a bit smarter (we can save a
 bit of code size sometimes); this is a possible future improvement.

 Prologues and epilogues are preferably placed into a block, either at
 the beginning or end of it, if it is needed for all predecessor resp.
 successor edges; or placed on the edge otherwise.

 If the placement of any prologue/epilogue leads to a situation we cannot
 handle (for example, an abnormal edge would need to be split, or some
 targets want to use some specific registers that may not be available
 where we want to put them), separate shrink-wrapping for the components
 in that prologue/epilogue is aborted.  */


1068/* Print the sbitmap COMPONENTS to the DUMP_FILE if not empty, with the
 label LABEL.  */
1070static void
1071dump_components (const char *label, sbitmap components)
1072{
if (bitmap_empty_p (components))
  return;

fprintf (dump_file, " [%s", label);

for (unsigned int j = 0; j < components->n_bits; j++)
  if (bitmap_bit_p (components, j))
    fprintf (dump_file, " %u", j);

fprintf (dump_file, "]");
1083}

1085/* The data we collect for each bb.  */
1086struct sw {
/* What components does this BB need?  */
sbitmap needs_components;

/* What components does this BB have?  This is the main decision this
   pass makes.  */
sbitmap has_components;

/* The components for which we placed code at the start of the BB (instead
   of on all incoming edges).  */
sbitmap head_components;

/* The components for which we placed code at the end of the BB (instead
   of on all outgoing edges).  */
sbitmap tail_components;

/* The frequency of executing the prologue for this BB, if a prologue is
   placed on this BB.  This is a pessimistic estimate (no prologue is
   needed for edges from blocks that have the component under consideration
   active already).  */
gcov_type own_cost;

/* The frequency of executing the prologue for this BB and all BBs
   dominated by it.  */
gcov_type total_cost;
1111};

1113/* A helper function for accessing the pass-specific info.  */
1114static inline struct sw *
1115SW (basic_block bb)
1116{
gcc_assert (bb->aux)((void)(!(bb->aux) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/shrink-wrap.cc"
, 1117, __FUNCTION__), 0 : 0));
return (struct sw *) bb->aux;
1119}

1121/* Create the pass-specific data structures for separately shrink-wrapping
 with components COMPONENTS.  */
1123static void
1124init_separate_shrink_wrap (sbitmap components)
1125{
basic_block bb;
FOR_ALL_BB_FN (bb, cfun)for (bb = (((cfun + 0))->cfg->x_entry_block_ptr); bb; bb
 = bb->next_bb)
  {
    bb->aux = xcalloc (1, sizeof (struct sw));

    SW (bb)->needs_components = targetm.shrink_wrap.components_for_bb (bb);

    /* Mark all basic blocks without successor as needing all components.
This avoids problems in at least cfgcleanup, sel-sched, and
regrename (largely to do with all paths to such a block still
needing the same dwarf CFI info).  */
    if (EDGE_COUNT (bb->succs)vec_safe_length (bb->succs) == 0)
bitmap_copy (SW (bb)->needs_components, components);

    if (dump_file)
{
 fprintf (dump_file, "bb %d components:", bb->index);
 dump_components ("has", SW (bb)->needs_components);
 fprintf (dump_file, "\n");
}

    SW (bb)->has_components = sbitmap_alloc (SBITMAP_SIZE (components)((components)->n_bits));
    SW (bb)->head_components = sbitmap_alloc (SBITMAP_SIZE (components)((components)->n_bits));
    SW (bb)->tail_components = sbitmap_alloc (SBITMAP_SIZE (components)((components)->n_bits));
    bitmap_clear (SW (bb)->has_components);
  }
1152}

1154/* Destroy the pass-specific data.  */
1155static void
1156fini_separate_shrink_wrap (void)
1157{
basic_block bb;
FOR_ALL_BB_FN (bb, cfun)for (bb = (((cfun + 0))->cfg->x_entry_block_ptr); bb; bb
 = bb->next_bb)
  if (bb->aux)
    {
sbitmap_free (SW (bb)->needs_components);
sbitmap_free (SW (bb)->has_components);
sbitmap_free (SW (bb)->head_components);
sbitmap_free (SW (bb)->tail_components);
free (bb->aux);
bb->aux = 0;
    }
1169}

1171/* Place the prologue for component WHICH, in the basic blocks dominated
 by HEAD.  Do a DFS over the dominator tree, and set bit WHICH in the
 HAS_COMPONENTS of a block if either the block has that bit set in
 NEEDS_COMPONENTS, or it is cheaper to place the prologue here than in all
 dominator subtrees separately.  */
1176static void
1177place_prologue_for_one_component (unsigned int which, basic_block head)
1178{
/* The block we are currently dealing with.  */
basic_block bb = head;
/* Is this the first time we visit this block, i.e. have we just gone
   down the tree.  */
bool first_visit = true;

/* Walk the dominator tree, visit one block per iteration of this loop.
   Each basic block is visited twice: once before visiting any children
   of the block, and once after visiting all of them (leaf nodes are
   visited only once).  As an optimization, we do not visit subtrees
   that can no longer influence the prologue placement.  */
for (;;)
  {
    /* First visit of a block: set the (children) cost accumulator to zero;
if the block does not have the component itself, walk down.  */
    if (first_visit)
{
 /* Initialize the cost.  The cost is the block execution frequency
    that does not come from backedges.  Calculating this by simply
    adding the cost of all edges that aren't backedges does not
    work: this does not always add up to the block frequency at
    all, and even if it does, rounding error makes for bad
    decisions.  */
 SW (bb)->own_cost = bb->count.to_frequency (cfun(cfun + 0));

 edge e;
 edge_iterator ei;
 FOR_EACH_EDGE (e, ei, bb->preds)for ((ei) = ei_start_1 (&((bb->preds))); ei_cond ((ei)
, &(e)); ei_next (&(ei)))
   if (dominated_by_p (CDI_DOMINATORS, e->src, bb))
     {
if (SW (bb)->own_cost > EDGE_FREQUENCY (e)e->count ().to_frequency ((cfun + 0)))
  SW (bb)->own_cost -= EDGE_FREQUENCY (e)e->count ().to_frequency ((cfun + 0));
else
  SW (bb)->own_cost = 0;
     }

 SW (bb)->total_cost = 0;

 if (!bitmap_bit_p (SW (bb)->needs_components, which)
     && first_dom_son (CDI_DOMINATORS, bb))
   {
     bb = first_dom_son (CDI_DOMINATORS, bb);
     continue;
   }
}

    /* If this block does need the component itself, or it is cheaper to
put the prologue here than in all the descendants that need it,
mark it so.  If this block's immediate post-dominator is dominated
by this block, and that needs the prologue, we can put it on this
block as well (earlier is better).  */
    if (bitmap_bit_p (SW (bb)->needs_components, which)
 || SW (bb)->total_cost > SW (bb)->own_cost)
{
 SW (bb)->total_cost = SW (bb)->own_cost;
 bitmap_set_bit (SW (bb)->has_components, which);
}
    else
{
 basic_block kid = get_immediate_dominator (CDI_POST_DOMINATORS, bb);
 if (dominated_by_p (CDI_DOMINATORS, kid, bb)
     && bitmap_bit_p (SW (kid)->has_components, which))
   {
     SW (bb)->total_cost = SW (bb)->own_cost;
     bitmap_set_bit (SW (bb)->has_components, which);
   }
}

    /* We are back where we started, so we are done now.  */
    if (bb == head)
return;

    /* We now know the cost of the subtree rooted at the current block.
Accumulate this cost in the parent.  */
    basic_block parent = get_immediate_dominator (CDI_DOMINATORS, bb);
    SW (parent)->total_cost += SW (bb)->total_cost;

    /* Don't walk the tree down unless necessary.  */
    if (next_dom_son (CDI_DOMINATORS, bb)
        && SW (parent)->total_cost <= SW (parent)->own_cost)
{
 bb = next_dom_son (CDI_DOMINATORS, bb);
 first_visit = true;
}
    else
{
 bb = parent;
 first_visit = false;
}
  }
1269}

1271/* Set HAS_COMPONENTS in every block to the maximum it can be set to without
 setting it on any path from entry to exit where it was not already set
 somewhere (or, for blocks that have no path to the exit, consider only
 paths from the entry to the block itself).  Return whether any changes
 were made to some HAS_COMPONENTS.  */
1276static bool
1277spread_components (sbitmap components)
1278{
basic_block entry_block = ENTRY_BLOCK_PTR_FOR_FN (cfun)(((cfun + 0))->cfg->x_entry_block_ptr);
basic_block exit_block = EXIT_BLOCK_PTR_FOR_FN (cfun)(((cfun + 0))->cfg->x_exit_block_ptr);

/* A stack of all blocks left to consider, and a bitmap of all blocks
   on that stack.  */
vec<basic_block> todo;
todo.create (n_basic_blocks_for_fn (cfun)(((cfun + 0))->cfg->x_n_basic_blocks));
auto_bitmap seen;

auto_sbitmap old (SBITMAP_SIZE (components)((components)->n_bits));

/* Find for every block the components that are *not* needed on some path
   from the entry to that block.  Do this with a flood fill from the entry
   block.  Every block can be visited at most as often as the number of
   components (plus one), and usually much less often.  */

if (dump_file)
  fprintf (dump_file, "Spreading down...\n");

basic_block bb;
FOR_ALL_BB_FN (bb, cfun)for (bb = (((cfun + 0))->cfg->x_entry_block_ptr); bb; bb
 = bb->next_bb)
  bitmap_clear (SW (bb)->head_components);

bitmap_copy (SW (entry_block)->head_components, components);

edge e;
edge_iterator ei;

todo.quick_push (single_succ (entry_block));
bitmap_set_bit (seen, single_succ (entry_block)->index);
while (!todo.is_empty ())
  {
    bb = todo.pop ();

    bitmap_copy (old, SW (bb)->head_components);

    FOR_EACH_EDGE (e, ei, bb->preds)for ((ei) = ei_start_1 (&((bb->preds))); ei_cond ((ei)
, &(e)); ei_next (&(ei)))
bitmap_ior (SW (bb)->head_components, SW (bb)->head_components,
    SW (e->src)->head_components);

    bitmap_and_compl (SW (bb)->head_components, SW (bb)->head_components,
	SW (bb)->has_components);

    if (!bitmap_equal_p (old, SW (bb)->head_components))
FOR_EACH_EDGE (e, ei, bb->succs)for ((ei) = ei_start_1 (&((bb->succs))); ei_cond ((ei)
, &(e)); ei_next (&(ei)))
 if (bitmap_set_bit (seen, e->dest->index))
   todo.quick_push (e->dest);

    bitmap_clear_bit (seen, bb->index);
  }

/* Find for every block the components that are *not* needed on some reverse
   path from the exit to that block.  */

if (dump_file)
  fprintf (dump_file, "Spreading up...\n");

/* First, mark all blocks not reachable from the exit block as not needing
   any component on any path to the exit.  Mark everything, and then clear
   again by a flood fill.  */

FOR_ALL_BB_FN (bb, cfun)for (bb = (((cfun + 0))->cfg->x_entry_block_ptr); bb; bb
 = bb->next_bb)
  bitmap_copy (SW (bb)->tail_components, components);

FOR_EACH_EDGE (e, ei, exit_block->preds)for ((ei) = ei_start_1 (&((exit_block->preds))); ei_cond
 ((ei), &(e)); ei_next (&(ei)))
  {
    todo.quick_push (e->src);
    bitmap_set_bit (seen, e->src->index);
  }

while (!todo.is_empty ())
  {
    bb = todo.pop ();

    if (!bitmap_empty_p (SW (bb)->tail_components))
FOR_EACH_EDGE (e, ei, bb->preds)for ((ei) = ei_start_1 (&((bb->preds))); ei_cond ((ei)
, &(e)); ei_next (&(ei)))
 if (bitmap_set_bit (seen, e->src->index))
   todo.quick_push (e->src);

    bitmap_clear (SW (bb)->tail_components);

    bitmap_clear_bit (seen, bb->index);
  }

/* And then, flood fill backwards to find for every block the components
   not needed on some path to the exit.  */

bitmap_copy (SW (exit_block)->tail_components, components);

FOR_EACH_EDGE (e, ei, exit_block->preds)for ((ei) = ei_start_1 (&((exit_block->preds))); ei_cond
 ((ei), &(e)); ei_next (&(ei)))
  {
    todo.quick_push (e->src);
    bitmap_set_bit (seen, e->src->index);
  }

while (!todo.is_empty ())
  {
    bb = todo.pop ();

    bitmap_copy (old, SW (bb)->tail_components);

    FOR_EACH_EDGE (e, ei, bb->succs)for ((ei) = ei_start_1 (&((bb->succs))); ei_cond ((ei)
, &(e)); ei_next (&(ei)))
bitmap_ior (SW (bb)->tail_components, SW (bb)->tail_components,
    SW (e->dest)->tail_components);

    bitmap_and_compl (SW (bb)->tail_components, SW (bb)->tail_components,
	SW (bb)->has_components);

    if (!bitmap_equal_p (old, SW (bb)->tail_components))
FOR_EACH_EDGE (e, ei, bb->preds)for ((ei) = ei_start_1 (&((bb->preds))); ei_cond ((ei)
, &(e)); ei_next (&(ei)))
 if (bitmap_set_bit (seen, e->src->index))
   todo.quick_push (e->src);

    bitmap_clear_bit (seen, bb->index);
  }

todo.release ();

/* Finally, mark everything not needed both forwards and backwards.  */

bool did_changes = false;

FOR_EACH_BB_FN (bb, cfun)for (bb = ((cfun + 0))->cfg->x_entry_block_ptr->next_bb
; bb != ((cfun + 0))->cfg->x_exit_block_ptr; bb = bb->
next_bb)
  {
    bitmap_copy (old, SW (bb)->has_components);

    bitmap_and (SW (bb)->head_components, SW (bb)->head_components,
  SW (bb)->tail_components);
    bitmap_and_compl (SW (bb)->has_components, components,
	SW (bb)->head_components);

    if (!did_changes && !bitmap_equal_p (old, SW (bb)->has_components))
did_changes = true;
  }

FOR_ALL_BB_FN (bb, cfun)for (bb = (((cfun + 0))->cfg->x_entry_block_ptr); bb; bb
 = bb->next_bb)
  {
    if (dump_file)
{
 fprintf (dump_file, "bb %d components:", bb->index);
 dump_components ("has", SW (bb)->has_components);
 fprintf (dump_file, "\n");
}
  }

return did_changes;
1425}

1427/* If we cannot handle placing some component's prologues or epilogues where
 we decided we should place them, unmark that component in COMPONENTS so
 that it is not wrapped separately.  */
1430static void
1431disqualify_problematic_components (sbitmap components)
1432{
auto_sbitmap pro (SBITMAP_SIZE (components)((components)->n_bits));
auto_sbitmap epi (SBITMAP_SIZE (components)((components)->n_bits));

basic_block bb;
FOR_EACH_BB_FN (bb, cfun)for (bb = ((cfun + 0))->cfg->x_entry_block_ptr->next_bb
; bb != ((cfun + 0))->cfg->x_exit_block_ptr; bb = bb->
next_bb)
  {
    edge e;
    edge_iterator ei;
    FOR_EACH_EDGE (e, ei, bb->succs)for ((ei) = ei_start_1 (&((bb->succs))); ei_cond ((ei)
, &(e)); ei_next (&(ei)))
{
 /* Find which components we want pro/epilogues for here.  */
 bitmap_and_compl (epi, SW (e->src)->has_components,
	    SW (e->dest)->has_components);
 bitmap_and_compl (pro, SW (e->dest)->has_components,
	    SW (e->src)->has_components);

 /* Ask the target what it thinks about things.  */
 if (!bitmap_empty_p (epi))
   targetm.shrink_wrap.disqualify_components (components, e, epi,
				       false);
 if (!bitmap_empty_p (pro))
   targetm.shrink_wrap.disqualify_components (components, e, pro,
				       true);

 /* If this edge doesn't need splitting, we're fine.  */
 if (single_pred_p (e->dest)
     && e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun)(((cfun + 0))->cfg->x_exit_block_ptr))
   continue;

 /* If the edge can be split, that is fine too.  */
 if ((e->flags & EDGE_ABNORMAL) == 0)
   continue;

 /* We also can handle sibcalls.  */
 if (e->dest == EXIT_BLOCK_PTR_FOR_FN (cfun)(((cfun + 0))->cfg->x_exit_block_ptr))
   {
     gcc_assert (e->flags & EDGE_SIBCALL)((void)(!(e->flags & EDGE_SIBCALL) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/shrink-wrap.cc"
, 1469, __FUNCTION__), 0 : 0));
     continue;
   }

 /* Remove from consideration those components we would need
    pro/epilogues for on edges where we cannot insert them.  */
 bitmap_and_compl (components, components, epi);
 bitmap_and_compl (components, components, pro);

 if (dump_file && !bitmap_subset_p (epi, components))
   {
     fprintf (dump_file, "  BAD epi %d->%d", e->src->index,
       e->dest->index);
     if (e->flags & EDGE_EH)
fprintf (dump_file, " for EH");
     dump_components ("epi", epi);
     fprintf (dump_file, "\n");
   }

 if (dump_file && !bitmap_subset_p (pro, components))
   {
     fprintf (dump_file, "  BAD pro %d->%d", e->src->index,
       e->dest->index);
     if (e->flags & EDGE_EH)
fprintf (dump_file, " for EH");
     dump_components ("pro", pro);
     fprintf (dump_file, "\n");
   }
}
  }
1499}

1501/* Place code for prologues and epilogues for COMPONENTS where we can put
 that code at the start of basic blocks.  */
1503static void
1504emit_common_heads_for_components (sbitmap components)
1505{
auto_sbitmap pro (SBITMAP_SIZE (components)((components)->n_bits));
auto_sbitmap epi (SBITMAP_SIZE (components)((components)->n_bits));
auto_sbitmap tmp (SBITMAP_SIZE (components)((components)->n_bits));

basic_block bb;
FOR_ALL_BB_FN (bb, cfun)for (bb = (((cfun + 0))->cfg->x_entry_block_ptr); bb; bb
 = bb->next_bb)
  bitmap_clear (SW (bb)->head_components);

FOR_EACH_BB_FN (bb, cfun)for (bb = ((cfun + 0))->cfg->x_entry_block_ptr->next_bb
; bb != ((cfun + 0))->cfg->x_exit_block_ptr; bb = bb->
next_bb)
  {
    /* Find which prologue resp. epilogue components are needed for all
predecessor edges to this block.  */

    /* First, select all possible components.  */
    bitmap_copy (epi, components);
    bitmap_copy (pro, components);

    edge e;
    edge_iterator ei;
    FOR_EACH_EDGE (e, ei, bb->preds)for ((ei) = ei_start_1 (&((bb->preds))); ei_cond ((ei)
, &(e)); ei_next (&(ei)))
{
 if (e->flags & EDGE_ABNORMAL)
   {
     bitmap_clear (epi);
     bitmap_clear (pro);
     break;
   }

 /* Deselect those epilogue components that should not be inserted
    for this edge.  */
 bitmap_and_compl (tmp, SW (e->src)->has_components,
	    SW (e->dest)->has_components);
 bitmap_and (epi, epi, tmp);

 /* Similar, for the prologue.  */
 bitmap_and_compl (tmp, SW (e->dest)->has_components,
	    SW (e->src)->has_components);
 bitmap_and (pro, pro, tmp);
}

    if (dump_file && !(bitmap_empty_p (epi) && bitmap_empty_p (pro)))
fprintf (dump_file, "  bb %d", bb->index);

    if (dump_file && !bitmap_empty_p (epi))
dump_components ("epi", epi);
    if (dump_file && !bitmap_empty_p (pro))
dump_components ("pro", pro);

    if (dump_file && !(bitmap_empty_p (epi) && bitmap_empty_p (pro)))
fprintf (dump_file, "\n");

    /* Place code after the BB note.  */
    if (!bitmap_empty_p (pro))
{
 start_sequence ();
 targetm.shrink_wrap.emit_prologue_components (pro);
 rtx_insn *seq = get_insns ();
 end_sequence ();
 record_prologue_seq (seq);

 emit_insn_after (seq, bb_note (bb));

 bitmap_ior (SW (bb)->head_components, SW (bb)->head_components, pro);
}

    if (!bitmap_empty_p (epi))
{
 start_sequence ();
 targetm.shrink_wrap.emit_epilogue_components (epi);
 rtx_insn *seq = get_insns ();
 end_sequence ();
 record_epilogue_seq (seq);

 emit_insn_after (seq, bb_note (bb));

 bitmap_ior (SW (bb)->head_components, SW (bb)->head_components, epi);
}
  }
1584}

1586/* Place code for prologues and epilogues for COMPONENTS where we can put
 that code at the end of basic blocks.  */
1588static void
1589emit_common_tails_for_components (sbitmap components)
1590{
auto_sbitmap pro (SBITMAP_SIZE (components)((components)->n_bits));
auto_sbitmap epi (SBITMAP_SIZE (components)((components)->n_bits));
auto_sbitmap tmp (SBITMAP_SIZE (components)((components)->n_bits));

basic_block bb;
FOR_ALL_BB_FN (bb, cfun)for (bb = (((cfun + 0))->cfg->x_entry_block_ptr); bb; bb
 = bb->next_bb)
  bitmap_clear (SW (bb)->tail_components);

FOR_EACH_BB_FN (bb, cfun)for (bb = ((cfun + 0))->cfg->x_entry_block_ptr->next_bb
; bb != ((cfun + 0))->cfg->x_exit_block_ptr; bb = bb->
next_bb)
  {
    /* Find which prologue resp. epilogue components are needed for all
successor edges from this block.  */
    if (EDGE_COUNT (bb->succs)vec_safe_length (bb->succs) == 0)
continue;

    /* First, select all possible components.  */
    bitmap_copy (epi, components);
    bitmap_copy (pro, components);

    edge e;
    edge_iterator ei;
    FOR_EACH_EDGE (e, ei, bb->succs)for ((ei) = ei_start_1 (&((bb->succs))); ei_cond ((ei)
, &(e)); ei_next (&(ei)))
{
 if (e->flags & EDGE_ABNORMAL)
   {
     bitmap_clear (epi);
     bitmap_clear (pro);
     break;
   }

 /* Deselect those epilogue components that should not be inserted
    for this edge, and also those that are already put at the head
    of the successor block.  */
 bitmap_and_compl (tmp, SW (e->src)->has_components,
	    SW (e->dest)->has_components);
 bitmap_and_compl (tmp, tmp, SW (e->dest)->head_components);
 bitmap_and (epi, epi, tmp);

 /* Similarly, for the prologue.  */
 bitmap_and_compl (tmp, SW (e->dest)->has_components,
	    SW (e->src)->has_components);
 bitmap_and_compl (tmp, tmp, SW (e->dest)->head_components);
 bitmap_and (pro, pro, tmp);
}

    /* If the last insn of this block is a control flow insn we cannot
put anything after it.  We can put our code before it instead,
but only if that jump insn is a simple jump.  */
    rtx_insn *last_insn = BB_END (bb)(bb)->il.x.rtl->end_;
    if (control_flow_insn_p (last_insn) && !simplejump_p (last_insn))
{
 bitmap_clear (epi);
 bitmap_clear (pro);
}

    if (dump_file && !(bitmap_empty_p (epi) && bitmap_empty_p (pro)))
fprintf (dump_file, "  bb %d", bb->index);

    if (dump_file && !bitmap_empty_p (epi))
dump_components ("epi", epi);
    if (dump_file && !bitmap_empty_p (pro))
dump_components ("pro", pro);

    if (dump_file && !(bitmap_empty_p (epi) && bitmap_empty_p (pro)))
fprintf (dump_file, "\n");

    /* Put the code at the end of the BB, but before any final jump.  */
    if (!bitmap_empty_p (epi))
{
 start_sequence ();
 targetm.shrink_wrap.emit_epilogue_components (epi);
 rtx_insn *seq = get_insns ();
 end_sequence ();
 record_epilogue_seq (seq);

 if (control_flow_insn_p (last_insn))
   emit_insn_before (seq, last_insn);
 else
   emit_insn_after (seq, last_insn);

 bitmap_ior (SW (bb)->tail_components, SW (bb)->tail_components, epi);
}

    if (!bitmap_empty_p (pro))
{
 start_sequence ();
 targetm.shrink_wrap.emit_prologue_components (pro);
 rtx_insn *seq = get_insns ();
 end_sequence ();
 record_prologue_seq (seq);

 if (control_flow_insn_p (last_insn))
   emit_insn_before (seq, last_insn);
 else
   emit_insn_after (seq, last_insn);

 bitmap_ior (SW (bb)->tail_components, SW (bb)->tail_components, pro);
}
  }
1690}

1692/* Place prologues and epilogues for COMPONENTS on edges, if we haven't already
 placed them inside blocks directly.  */
1694static void
1695insert_prologue_epilogue_for_components (sbitmap components)
1696{
auto_sbitmap pro (SBITMAP_SIZE (components)((components)->n_bits));
auto_sbitmap epi (SBITMAP_SIZE (components)((components)->n_bits));

basic_block bb;
FOR_EACH_BB_FN (bb, cfun)for (bb = ((cfun + 0))->cfg->x_entry_block_ptr->next_bb
; bb != ((cfun + 0))->cfg->x_exit_block_ptr; bb = bb->
next_bb)
  {
    if (!bb->aux)
continue;

    edge e;
    edge_iterator ei;
    FOR_EACH_EDGE (e, ei, bb->succs)for ((ei) = ei_start_1 (&((bb->succs))); ei_cond ((ei)
, &(e)); ei_next (&(ei)))
{
 /* Find which pro/epilogue components are needed on this edge.  */
 bitmap_and_compl (epi, SW (e->src)->has_components,
	    SW (e->dest)->has_components);
 bitmap_and_compl (pro, SW (e->dest)->has_components,
	    SW (e->src)->has_components);
 bitmap_and (epi, epi, components);
 bitmap_and (pro, pro, components);

 /* Deselect those we already have put at the head or tail of the
    edge's dest resp. src.  */
 bitmap_and_compl (epi, epi, SW (e->dest)->head_components);
 bitmap_and_compl (pro, pro, SW (e->dest)->head_components);
 bitmap_and_compl (epi, epi, SW (e->src)->tail_components);
 bitmap_and_compl (pro, pro, SW (e->src)->tail_components);

 if (!bitmap_empty_p (epi) || !bitmap_empty_p (pro))
   {
     if (dump_file)
{
  fprintf (dump_file, "  %d->%d", e->src->index,
	   e->dest->index);
  dump_components ("epi", epi);
  dump_components ("pro", pro);
  if (e->flags & EDGE_SIBCALL)
    fprintf (dump_file, "  (SIBCALL)");
  else if (e->flags & EDGE_ABNORMAL)
    fprintf (dump_file, "  (ABNORMAL)");
  fprintf (dump_file, "\n");
}

     /* Put the epilogue components in place.  */
     start_sequence ();
     targetm.shrink_wrap.emit_epilogue_components (epi);
     rtx_insn *seq = get_insns ();
     end_sequence ();
     record_epilogue_seq (seq);

     if (e->flags & EDGE_SIBCALL)
{
  gcc_assert (e->dest == EXIT_BLOCK_PTR_FOR_FN (cfun))((void)(!(e->dest == (((cfun + 0))->cfg->x_exit_block_ptr
)) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/shrink-wrap.cc"
, 1749, __FUNCTION__), 0 : 0));

  rtx_insn *insn = BB_END (e->src)(e->src)->il.x.rtl->end_;
  gcc_assert (CALL_P (insn) && SIBLING_CALL_P (insn))((void)(!((((enum rtx_code) (insn)->code) == CALL_INSN) &&
 (__extension__ ({ __typeof ((insn)) const _rtx = ((insn)); if
 (((enum rtx_code) (_rtx)->code) != CALL_INSN) rtl_check_failed_flag
 ("SIBLING_CALL_P", _rtx, "/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/shrink-wrap.cc"
, 1752, __FUNCTION__); _rtx; })->jump)) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/shrink-wrap.cc"
, 1752, __FUNCTION__), 0 : 0));
  emit_insn_before (seq, insn);
}
     else if (e->dest == EXIT_BLOCK_PTR_FOR_FN (cfun)(((cfun + 0))->cfg->x_exit_block_ptr))
{
  gcc_assert (e->flags & EDGE_FALLTHRU)((void)(!(e->flags & EDGE_FALLTHRU) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/shrink-wrap.cc"
, 1757, __FUNCTION__), 0 : 0));
  basic_block new_bb = split_edge (e);
  emit_insn_after (seq, BB_END (new_bb)(new_bb)->il.x.rtl->end_);
}
     else
insert_insn_on_edge (seq, e);

     /* Put the prologue components in place.  */
     start_sequence ();
     targetm.shrink_wrap.emit_prologue_components (pro);
     seq = get_insns ();
     end_sequence ();
     record_prologue_seq (seq);

     insert_insn_on_edge (seq, e);
   }
}
  }

commit_edge_insertions ();
1777}

1779/* The main entry point to this subpass.  FIRST_BB is where the prologue
 would be normally put.  */
1781void
1782try_shrink_wrapping_separate (basic_block first_bb)
1783{
if (!(SHRINK_WRAPPING_ENABLED(global_options.x_flag_shrink_wrap && targetm.have_simple_return
 ())
&& flag_shrink_wrap_separateglobal_options.x_flag_shrink_wrap_separate
&& optimize_function_for_speed_p (cfun(cfun + 0))
&& targetm.shrink_wrap.get_separate_components))
  return;

/* We don't handle "strange" functions.  */
if (cfun(cfun + 0)->calls_alloca
    || cfun(cfun + 0)->calls_setjmp
    || cfun(cfun + 0)->can_throw_non_call_exceptions
    || crtl(&x_rtl)->calls_eh_return
    || crtl(&x_rtl)->has_nonlocal_goto
    || crtl(&x_rtl)->saves_all_registers)
  return;

/* Ask the target what components there are.  If it returns NULL, don't
   do anything.  */
sbitmap components = targetm.shrink_wrap.get_separate_components ();
if (!components)
  return;

/* We need LIVE info, not defining anything in the entry block and not
   using anything in the exit block.  A block then needs a component if
   the register for that component is in the IN or GEN or KILL set for
   that block.  */
df_scan(df->problems_by_index[DF_SCAN])->local_flags |= DF_SCAN_EMPTY_ENTRY_EXIT;
df_update_entry_exit_and_calls ();
df_live_add_problem ();
df_live_set_all_dirty ();
df_analyze ();

calculate_dominance_info (CDI_DOMINATORS);
calculate_dominance_info (CDI_POST_DOMINATORS);

init_separate_shrink_wrap (components);

sbitmap_iterator sbi;
unsigned int j;
EXECUTE_IF_SET_IN_BITMAP (components, 0, j, sbi)for (bmp_iter_set_init (&(sbi), (components), (0), &(
j)); bmp_iter_set (&(sbi), &(j)); bmp_iter_next (&
(sbi), &(j)))
  place_prologue_for_one_component (j, first_bb);

/* Try to minimize the number of saves and restores.  Do this as long as
   it changes anything.  This does not iterate more than a few times.  */
int spread_times = 0;
while (spread_components (components))
  {
    spread_times++;

    if (dump_file)
fprintf (dump_file, "Now spread %d times.\n", spread_times);
  }

disqualify_problematic_components (components);

/* Don't separately shrink-wrap anything where the "main" prologue will
   go; the target code can often optimize things if it is presented with
   all components together (say, if it generates store-multiple insns).  */
bitmap_and_compl (components, components, SW (first_bb)->has_components);

if (bitmap_empty_p (components))
  {
    if (dump_file)
fprintf (dump_file, "Not wrapping anything separately.\n");
  }
else
  {
    if (dump_file)
{
 fprintf (dump_file, "The components we wrap separately are");
 dump_components ("sep", components);
 fprintf (dump_file, "\n");

 fprintf (dump_file, "... Inserting common heads...\n");
}

    emit_common_heads_for_components (components);

    if (dump_file)
fprintf (dump_file, "... Inserting common tails...\n");

    emit_common_tails_for_components (components);

    if (dump_file)
fprintf (dump_file, "... Inserting the more difficult ones...\n");

    insert_prologue_epilogue_for_components (components);

    if (dump_file)
fprintf (dump_file, "... Done.\n");

    targetm.shrink_wrap.set_handled_components (components);

    crtl(&x_rtl)->shrink_wrapped_separate = true;
  }

fini_separate_shrink_wrap ();

sbitmap_free (components);
free_dominance_info (CDI_DOMINATORS);
free_dominance_info (CDI_POST_DOMINATORS);

/* All done.  */
df_scan(df->problems_by_index[DF_SCAN])->local_flags &= ~DF_SCAN_EMPTY_ENTRY_EXIT;
df_update_entry_exit_and_calls ();
df_live_set_all_dirty ();
df_analyze ();
1890}

←

/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/hard-reg-set.h

→

1/* Sets (bit vectors) of hard registers, and operations on them.
2   Copyright (C) 1987-2023 Free Software Foundation, Inc.
3 
4This file is part of GCC
5 
6GCC is free software; you can redistribute it and/or modify it under
7the terms of the GNU General Public License as published by the Free
8Software Foundation; either version 3, or (at your option) any later
9version.
10 
11GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12WARRANTY; without even the implied warranty of MERCHANTABILITY or
13FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
14for more details.
15 
16You should have received a copy of the GNU General Public License
17along with GCC; see the file COPYING3.  If not see
18<http://www.gnu.org/licenses/>.  */
19 
20#ifndef GCC_HARD_REG_SET_H
21#define GCC_HARD_REG_SET_H
22 
23#include "array-traits.h"
24 
25/* Define the type of a set of hard registers.  */
26 
27/* HARD_REG_ELT_TYPE is a typedef of the unsigned integral type which
28   will be used for hard reg sets, either alone or in an array.
29 
30   If HARD_REG_SET is a macro, its definition is HARD_REG_ELT_TYPE,
31   and it has enough bits to represent all the target machine's hard
32   registers.  Otherwise, it is a typedef for a suitably sized array
33   of HARD_REG_ELT_TYPEs.  HARD_REG_SET_LONGS is defined as how many.
34 
35   Note that lots of code assumes that the first part of a regset is
36   the same format as a HARD_REG_SET.  To help make sure this is true,
37   we only try the widest fast integer mode (HOST_WIDEST_FAST_INT)
38   instead of all the smaller types.  This approach loses only if
39   there are very few registers and then only in the few cases where
40   we have an array of HARD_REG_SETs, so it needn't be as complex as
41   it used to be.  */
42 
43typedef unsigned HOST_WIDEST_FAST_INTlong HARD_REG_ELT_TYPE;
44 
45#if FIRST_PSEUDO_REGISTER76 <= HOST_BITS_PER_WIDEST_FAST_INT(8 * 8)
46 
47typedef HARD_REG_ELT_TYPE HARD_REG_SET;
48typedef const HARD_REG_SET const_hard_reg_set;
49 
50#else
51 
52#define HARD_REG_SET_LONGS((76 + (8 * 8) - 1) / (8 * 8)) \
53 ((FIRST_PSEUDO_REGISTER76 + HOST_BITS_PER_WIDEST_FAST_INT(8 * 8) - 1)	\
54  / HOST_BITS_PER_WIDEST_FAST_INT(8 * 8))
55 
56struct HARD_REG_SET
57{
58  HARD_REG_SET
59  operator~ () const
60  {
61    HARD_REG_SET res;
62    for (unsigned int i = 0; i < ARRAY_SIZE (elts)(sizeof (elts) / sizeof ((elts)[0])); ++i)
63      res.elts[i] = ~elts[i];
64    return res;
65  }
66 
67  HARD_REG_SET
68  operator& (const HARD_REG_SET &other) const
69  {
70    HARD_REG_SET res;
71    for (unsigned int i = 0; i < ARRAY_SIZE (elts)(sizeof (elts) / sizeof ((elts)[0])); ++i)
72      res.elts[i] = elts[i] & other.elts[i];
73    return res;
74  }
75 
76  HARD_REG_SET &
77  operator&= (const HARD_REG_SET &other)
78  {
79    for (unsigned int i = 0; i < ARRAY_SIZE (elts)(sizeof (elts) / sizeof ((elts)[0])); ++i)
80      elts[i] &= other.elts[i];
81    return *this;
82  }
83 
84  HARD_REG_SET
85  operator| (const HARD_REG_SET &other) const
86  {
87    HARD_REG_SET res;
88    for (unsigned int i = 0; i < ARRAY_SIZE (elts)(sizeof (elts) / sizeof ((elts)[0])); ++i)
89      res.elts[i] = elts[i] | other.elts[i];
90    return res;
91  }
92 
93  HARD_REG_SET &
94  operator|= (const HARD_REG_SET &other)
95  {
96    for (unsigned int i = 0; i < ARRAY_SIZE (elts)(sizeof (elts) / sizeof ((elts)[0])); ++i)
97      elts[i] |= other.elts[i];
98    return *this;
99  }
100 
101  bool
102  operator== (const HARD_REG_SET &other) const
103  {
104    HARD_REG_ELT_TYPE bad = 0;
105    for (unsigned int i = 0; i < ARRAY_SIZE (elts)(sizeof (elts) / sizeof ((elts)[0])); ++i)
106      bad |= (elts[i] ^ other.elts[i]);
107    return bad == 0;
108  }
109 
110  bool
111  operator!= (const HARD_REG_SET &other) const
112  {
113    return !operator== (other);
114  }
115 
116  HARD_REG_ELT_TYPE elts[HARD_REG_SET_LONGS((76 + (8 * 8) - 1) / (8 * 8))];
117};
118typedef const HARD_REG_SET &const_hard_reg_set;
119 
120template<>
121struct array_traits<HARD_REG_SET>
122{
123  typedef HARD_REG_ELT_TYPE element_type;
124  static const bool has_constant_size = true;
125  static const size_t constant_size = HARD_REG_SET_LONGS((76 + (8 * 8) - 1) / (8 * 8));
126  static const element_type *base (const HARD_REG_SET &x) { return x.elts; }
127  static size_t size (const HARD_REG_SET &) { return HARD_REG_SET_LONGS((76 + (8 * 8) - 1) / (8 * 8)); }
128};
129 
130#endif
131 
132/* HARD_REG_SET wrapped into a structure, to make it possible to
133   use HARD_REG_SET even in APIs that should not include
134   hard-reg-set.h.  */
135struct hard_reg_set_container
136{
137  HARD_REG_SET set;
138};
139 
140/* HARD_CONST is used to cast a constant to the appropriate type
141   for use with a HARD_REG_SET.  */
142 
143#define HARD_CONST(X)((HARD_REG_ELT_TYPE) (X)) ((HARD_REG_ELT_TYPE) (X))
144 
145/* Define macros SET_HARD_REG_BIT, CLEAR_HARD_REG_BIT and TEST_HARD_REG_BIT
146   to set, clear or test one bit in a hard reg set of type HARD_REG_SET.
147   All three take two arguments: the set and the register number.
148 
149   In the case where sets are arrays of longs, the first argument
150   is actually a pointer to a long.
151 
152   Define two macros for initializing a set:
153   CLEAR_HARD_REG_SET and SET_HARD_REG_SET.
154   These take just one argument.
155 
156   Also define:
157 
158   hard_reg_set_subset_p (X, Y), which returns true if X is a subset of Y.
159   hard_reg_set_intersect_p (X, Y), which returns true if X and Y intersect.
160   hard_reg_set_empty_p (X), which returns true if X is empty.  */
161 
162#define UHOST_BITS_PER_WIDE_INT((unsigned) (8 * 8)) ((unsigned) HOST_BITS_PER_WIDEST_FAST_INT(8 * 8))
163 
164#if FIRST_PSEUDO_REGISTER76 <= HOST_BITS_PER_WIDEST_FAST_INT(8 * 8)
165 
166#define SET_HARD_REG_BIT(SET, BIT)  \
167 ((SET) |= HARD_CONST (1)((HARD_REG_ELT_TYPE) (1)) << (BIT))
168#define CLEAR_HARD_REG_BIT(SET, BIT)  \
169 ((SET) &= ~(HARD_CONST (1)((HARD_REG_ELT_TYPE) (1)) << (BIT)))
170#define TEST_HARD_REG_BIT(SET, BIT)  \
171 (!!((SET) & (HARD_CONST (1)((HARD_REG_ELT_TYPE) (1)) << (BIT))))
172 
173#define CLEAR_HARD_REG_SET(TO) ((TO) = HARD_CONST (0)((HARD_REG_ELT_TYPE) (0)))
174#define SET_HARD_REG_SET(TO) ((TO) = ~ HARD_CONST (0)((HARD_REG_ELT_TYPE) (0)))
175 
176inline bool
177hard_reg_set_subset_p (const_hard_reg_set x, const_hard_reg_set y)
178{
179  return (x & ~y) == HARD_CONST (0)((HARD_REG_ELT_TYPE) (0));
180}
181 
182inline bool
183hard_reg_set_intersect_p (const_hard_reg_set x, const_hard_reg_set y)
184{
185  return (x & y) != HARD_CONST (0)((HARD_REG_ELT_TYPE) (0));
186}
187 
188inline bool
189hard_reg_set_empty_p (const_hard_reg_set x)
190{
191  return x == HARD_CONST (0)((HARD_REG_ELT_TYPE) (0));
192}
193 
194#else
195 
196inline void
197SET_HARD_REG_BIT (HARD_REG_SET &set, unsigned int bit)
198{
199  set.elts[bit / UHOST_BITS_PER_WIDE_INT((unsigned) (8 * 8))]
200    |= HARD_CONST (1)((HARD_REG_ELT_TYPE) (1)) << (bit % UHOST_BITS_PER_WIDE_INT((unsigned) (8 * 8)));
54
←
The left expression of the compound assignment is an uninitialized value. The computed value will also be garbage
201}
202 
203inline void
204CLEAR_HARD_REG_BIT (HARD_REG_SET &set, unsigned int bit)
205{
206  set.elts[bit / UHOST_BITS_PER_WIDE_INT((unsigned) (8 * 8))]
207    &= ~(HARD_CONST (1)((HARD_REG_ELT_TYPE) (1)) << (bit % UHOST_BITS_PER_WIDE_INT((unsigned) (8 * 8))));
208}
209 
210inline bool
211TEST_HARD_REG_BIT (const_hard_reg_set set, unsigned int bit)
212{
213  return (set.elts[bit / UHOST_BITS_PER_WIDE_INT((unsigned) (8 * 8))]
214	  & (HARD_CONST (1)((HARD_REG_ELT_TYPE) (1)) << (bit % UHOST_BITS_PER_WIDE_INT((unsigned) (8 * 8)))));
215}
216 
217inline void
218CLEAR_HARD_REG_SET (HARD_REG_SET &set)
219{
220  for (unsigned int i = 0; i < ARRAY_SIZE (set.elts)(sizeof (set.elts) / sizeof ((set.elts)[0])); ++i)
22
←
Loop condition is true.  Entering loop body→
23
←
Loop condition is true.  Entering loop body→
24
←
Loop condition is false. Execution continues on line 220→
221    set.elts[i] = 0;
222}
223 
224inline void
225SET_HARD_REG_SET (HARD_REG_SET &set)
226{
227  for (unsigned int i = 0; i < ARRAY_SIZE (set.elts)(sizeof (set.elts) / sizeof ((set.elts)[0])); ++i)
228    set.elts[i] = -1;
229}
230 
231inline bool
232hard_reg_set_subset_p (const_hard_reg_set x, const_hard_reg_set y)
233{
234  HARD_REG_ELT_TYPE bad = 0;
235  for (unsigned int i = 0; i < ARRAY_SIZE (x.elts)(sizeof (x.elts) / sizeof ((x.elts)[0])); ++i)
236    bad |= (x.elts[i] & ~y.elts[i]);
237  return bad == 0;
238}
239 
240inline bool
241hard_reg_set_intersect_p (const_hard_reg_set x, const_hard_reg_set y)
242{
243  HARD_REG_ELT_TYPE good = 0;
244  for (unsigned int i = 0; i < ARRAY_SIZE (x.elts)(sizeof (x.elts) / sizeof ((x.elts)[0])); ++i)
245    good |= (x.elts[i] & y.elts[i]);
246  return good != 0;
247}
248 
249inline bool
250hard_reg_set_empty_p (const_hard_reg_set x)
251{
252  HARD_REG_ELT_TYPE bad = 0;
253  for (unsigned int i = 0; i < ARRAY_SIZE (x.elts)(sizeof (x.elts) / sizeof ((x.elts)[0])); ++i)
254    bad |= x.elts[i];
255  return bad == 0;
256}
257#endif
258 
259/* Iterator for hard register sets.  */
260 
261struct hard_reg_set_iterator
262{
263  /* Pointer to the current element.  */
264  const HARD_REG_ELT_TYPE *pelt;
265 
266  /* The length of the set.  */
267  unsigned short length;
268 
269  /* Word within the current element.  */
270  unsigned short word_no;
271 
272  /* Contents of the actually processed word.  When finding next bit
273     it is shifted right, so that the actual bit is always the least
274     significant bit of ACTUAL.  */
275  HARD_REG_ELT_TYPE bits;
276};
277 
278#define HARD_REG_ELT_BITS((unsigned) (8 * 8)) UHOST_BITS_PER_WIDE_INT((unsigned) (8 * 8))
279 
280/* The implementation of the iterator functions is fully analogous to
281   the bitmap iterators.  */
282inline void
283hard_reg_set_iter_init (hard_reg_set_iterator *iter, const_hard_reg_set set,
284                        unsigned min, unsigned *regno)
285{
286#ifdef HARD_REG_SET_LONGS((76 + (8 * 8) - 1) / (8 * 8))
287  iter->pelt = set.elts;
288  iter->length = HARD_REG_SET_LONGS((76 + (8 * 8) - 1) / (8 * 8));
289#else
290  iter->pelt = &set;
291  iter->length = 1;
292#endif
293  iter->word_no = min / HARD_REG_ELT_BITS((unsigned) (8 * 8));
294  if (iter->word_no < iter->length)
295    {
296      iter->bits = iter->pelt[iter->word_no];
297      iter->bits >>= min % HARD_REG_ELT_BITS((unsigned) (8 * 8));
298 
299      /* This is required for correct search of the next bit.  */
300      min += !iter->bits;
301    }
302  *regno = min;
303}
304 
305inline bool
306hard_reg_set_iter_set (hard_reg_set_iterator *iter, unsigned *regno)
307{
308  while (1)
309    {
310      /* Return false when we're advanced past the end of the set.  */
311      if (iter->word_no >= iter->length)
312        return false;
313 
314      if (iter->bits)
315        {
316          /* Find the correct bit and return it.  */
317          while (!(iter->bits & 1))
318            {
319              iter->bits >>= 1;
320              *regno += 1;
321            }
322          return (*regno < FIRST_PSEUDO_REGISTER76);
323        }
324 
325      /* Round to the beginning of the next word.  */
326      *regno = (*regno + HARD_REG_ELT_BITS((unsigned) (8 * 8)) - 1);
327      *regno -= *regno % HARD_REG_ELT_BITS((unsigned) (8 * 8));
328 
329      /* Find the next non-zero word.  */
330      while (++iter->word_no < iter->length)
331        {
332          iter->bits = iter->pelt[iter->word_no];
333          if (iter->bits)
334            break;
335          *regno += HARD_REG_ELT_BITS((unsigned) (8 * 8));
336        }
337    }
338}
339 
340inline void
341hard_reg_set_iter_next (hard_reg_set_iterator *iter, unsigned *regno)
342{
343  iter->bits >>= 1;
344  *regno += 1;
345}
346 
347#define EXECUTE_IF_SET_IN_HARD_REG_SET(SET, MIN, REGNUM, ITER)for (hard_reg_set_iter_init (&(ITER), (SET), (MIN), &
(REGNUM)); hard_reg_set_iter_set (&(ITER), &(REGNUM))
; hard_reg_set_iter_next (&(ITER), &(REGNUM)))          \
348  for (hard_reg_set_iter_init (&(ITER), (SET), (MIN), &(REGNUM));       \
349       hard_reg_set_iter_set (&(ITER), &(REGNUM));                      \
350       hard_reg_set_iter_next (&(ITER), &(REGNUM)))
351 
352 
353/* Define some standard sets of registers.  */
354 
355/* Indexed by hard register number, contains 1 for registers
356   that are being used for global register decls.
357   These must be exempt from ordinary flow analysis
358   and are also considered fixed.  */
359 
360extern char global_regs[FIRST_PSEUDO_REGISTER76];
361 
362extern HARD_REG_SET global_reg_set;
363 
364class simplifiable_subreg;
365class subreg_shape;
366 
367struct simplifiable_subregs_hasher : nofree_ptr_hash <simplifiable_subreg>
368{
369  typedef const subreg_shape *compare_type;
370 
371  static inline hashval_t hash (const simplifiable_subreg *);
372  static inline bool equal (const simplifiable_subreg *, const subreg_shape *);
373};
374 
375struct target_hard_regs {
376  void finalize ();
377 
378  /* The set of registers that actually exist on the current target.  */
379  HARD_REG_SET x_accessible_reg_set;
380 
381  /* The set of registers that should be considered to be register
382     operands.  It is a subset of x_accessible_reg_set.  */
383  HARD_REG_SET x_operand_reg_set;
384 
385  /* Indexed by hard register number, contains 1 for registers
386     that are fixed use (stack pointer, pc, frame pointer, etc.;.
387     These are the registers that cannot be used to allocate
388     a pseudo reg whose life does not cross calls.  */
389  char x_fixed_regs[FIRST_PSEUDO_REGISTER76];
390 
391  /* The same info as a HARD_REG_SET.  */
392  HARD_REG_SET x_fixed_reg_set;
393 
394  /* Indexed by hard register number, contains 1 for registers
395     that are fixed use or are clobbered by function calls.
396     These are the registers that cannot be used to allocate
397     a pseudo reg whose life crosses calls.  */
398  char x_call_used_regs[FIRST_PSEUDO_REGISTER76];
399 
400  /* For targets that use reload rather than LRA, this is the set
401     of registers that we are able to save and restore around calls
402     (i.e. those for which we know a suitable mode and set of
403     load/store instructions exist).  For LRA targets it contains
404     all registers.
405 
406     This is legacy information and should be removed if all targets
407     switch to LRA.  */
408  HARD_REG_SET x_savable_regs;
409 
410  /* Contains registers that are fixed use -- i.e. in fixed_reg_set -- but
411     only if they are not merely part of that set because they are global
412     regs.  Global regs that are not otherwise fixed can still take part
413     in register allocation.  */
414  HARD_REG_SET x_fixed_nonglobal_reg_set;
415 
416  /* Contains 1 for registers that are set or clobbered by calls.  */
417  /* ??? Ideally, this would be just call_used_regs plus global_regs, but
418     for someone's bright idea to have call_used_regs strictly include
419     fixed_regs.  Which leaves us guessing as to the set of fixed_regs
420     that are actually preserved.  We know for sure that those associated
421     with the local stack frame are safe, but scant others.  */
422  HARD_REG_SET x_regs_invalidated_by_call;
423 
424  /* Table of register numbers in the order in which to try to use them.  */
425  int x_reg_alloc_order[FIRST_PSEUDO_REGISTER76];
426 
427  /* The inverse of reg_alloc_order.  */
428  int x_inv_reg_alloc_order[FIRST_PSEUDO_REGISTER76];
429 
430  /* For each reg class, a HARD_REG_SET saying which registers are in it.  */
431  HARD_REG_SET x_reg_class_contents[N_REG_CLASSES((int) LIM_REG_CLASSES)];
432 
433  /* For each reg class, a boolean saying whether the class contains only
434     fixed registers.  */
435  bool x_class_only_fixed_regs[N_REG_CLASSES((int) LIM_REG_CLASSES)];
436 
437  /* For each reg class, number of regs it contains.  */
438  unsigned int x_reg_class_size[N_REG_CLASSES((int) LIM_REG_CLASSES)];
439 
440  /* For each reg class, table listing all the classes contained in it.  */
441  enum reg_class x_reg_class_subclasses[N_REG_CLASSES((int) LIM_REG_CLASSES)][N_REG_CLASSES((int) LIM_REG_CLASSES)];
442 
443  /* For each pair of reg classes,
444     a largest reg class contained in their union.  */
445  enum reg_class x_reg_class_subunion[N_REG_CLASSES((int) LIM_REG_CLASSES)][N_REG_CLASSES((int) LIM_REG_CLASSES)];
446 
447  /* For each pair of reg classes,
448     the smallest reg class that contains their union.  */
449  enum reg_class x_reg_class_superunion[N_REG_CLASSES((int) LIM_REG_CLASSES)][N_REG_CLASSES((int) LIM_REG_CLASSES)];
450 
451  /* Vector indexed by hardware reg giving its name.  */
452  const char *x_reg_names[FIRST_PSEUDO_REGISTER76];
453 
454  /* Records which registers can form a particular subreg, with the subreg
455     being identified by its outer mode, inner mode and offset.  */
456  hash_table <simplifiable_subregs_hasher> *x_simplifiable_subregs;
457};
458 
459extern struct target_hard_regs default_target_hard_regs;
460#if SWITCHABLE_TARGET1
461extern struct target_hard_regs *this_target_hard_regs;
462#else
463#define this_target_hard_regs (&default_target_hard_regs)
464#endif
465 
466#define accessible_reg_set(this_target_hard_regs->x_accessible_reg_set) \
467  (this_target_hard_regs->x_accessible_reg_set)
468#define operand_reg_set(this_target_hard_regs->x_operand_reg_set) \
469  (this_target_hard_regs->x_operand_reg_set)
470#define fixed_regs(this_target_hard_regs->x_fixed_regs) \
471  (this_target_hard_regs->x_fixed_regs)
472#define fixed_reg_set(this_target_hard_regs->x_fixed_reg_set) \
473  (this_target_hard_regs->x_fixed_reg_set)
474#define fixed_nonglobal_reg_set(this_target_hard_regs->x_fixed_nonglobal_reg_set) \
475  (this_target_hard_regs->x_fixed_nonglobal_reg_set)
476#ifdef IN_TARGET_CODE
477#define call_used_regs \
478  (this_target_hard_regs->x_call_used_regs)
479#endif
480#define savable_regs(this_target_hard_regs->x_savable_regs) \
481  (this_target_hard_regs->x_savable_regs)
482#ifdef IN_TARGET_CODE
483#define regs_invalidated_by_call \
484  (this_target_hard_regs->x_regs_invalidated_by_call)
485#define call_used_or_fixed_regs \
486  (regs_invalidated_by_call | fixed_reg_set(this_target_hard_regs->x_fixed_reg_set))
487#endif
488#define reg_alloc_order(this_target_hard_regs->x_reg_alloc_order) \
489  (this_target_hard_regs->x_reg_alloc_order)
490#define inv_reg_alloc_order(this_target_hard_regs->x_inv_reg_alloc_order) \
491  (this_target_hard_regs->x_inv_reg_alloc_order)
492#define reg_class_contents(this_target_hard_regs->x_reg_class_contents) \
493  (this_target_hard_regs->x_reg_class_contents)
494#define class_only_fixed_regs(this_target_hard_regs->x_class_only_fixed_regs) \
495  (this_target_hard_regs->x_class_only_fixed_regs)
496#define reg_class_size(this_target_hard_regs->x_reg_class_size) \
497  (this_target_hard_regs->x_reg_class_size)
498#define reg_class_subclasses(this_target_hard_regs->x_reg_class_subclasses) \
499  (this_target_hard_regs->x_reg_class_subclasses)
500#define reg_class_subunion(this_target_hard_regs->x_reg_class_subunion) \
501  (this_target_hard_regs->x_reg_class_subunion)
502#define reg_class_superunion(this_target_hard_regs->x_reg_class_superunion) \
503  (this_target_hard_regs->x_reg_class_superunion)
504#define reg_names(this_target_hard_regs->x_reg_names) \
505  (this_target_hard_regs->x_reg_names)
506 
507/* Vector indexed by reg class giving its name.  */
508 
509extern const char * reg_class_names[];
510 
511/* Given a hard REGN a FROM mode and a TO mode, return true if
512   REGN can change from mode FROM to mode TO.  */
513#define REG_CAN_CHANGE_MODE_P(REGN, FROM, TO)(targetm.can_change_mode_class (FROM, TO, (regclass_map[(REGN
)])))                          \
514  (targetm.can_change_mode_class (FROM, TO, REGNO_REG_CLASS (REGN)(regclass_map[(REGN)])))
515 
516#ifdef IN_TARGET_CODE
517/* Return true if register REGNO is either fixed or call-used
518   (aka call-clobbered).  */
519 
520inline bool
521call_used_or_fixed_reg_p (unsigned int regno)
522{
523  return fixed_regs(this_target_hard_regs->x_fixed_regs)[regno] || this_target_hard_regs->x_call_used_regs[regno];
524}
525#endif
526 
527#endif /* ! GCC_HARD_REG_SET_H */

←

/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/regs.h

1/* Define per-register tables for data flow info and register allocation.
2   Copyright (C) 1987-2023 Free Software Foundation, Inc.
3 
4This file is part of GCC.
5 
6GCC is free software; you can redistribute it and/or modify it under
7the terms of the GNU General Public License as published by the Free
8Software Foundation; either version 3, or (at your option) any later
9version.
10 
11GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12WARRANTY; without even the implied warranty of MERCHANTABILITY or
13FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
14for more details.
15 
16You should have received a copy of the GNU General Public License
17along with GCC; see the file COPYING3.  If not see
18<http://www.gnu.org/licenses/>.  */
19 
20#ifndef GCC_REGS_H
21#define GCC_REGS_H
22 
23#define REG_BYTES(R)mode_size[(int) ((machine_mode) (R)->mode)] mode_size[(int) GET_MODE (R)((machine_mode) (R)->mode)]
24 
25/* When you only have the mode of a pseudo register before it has a hard
26   register chosen for it, this reports the size of each hard register
27   a pseudo in such a mode would get allocated to.  A target may
28   override this.  */
29 
30#ifndef REGMODE_NATURAL_SIZE
31#define REGMODE_NATURAL_SIZE(MODE)ix86_regmode_natural_size (MODE)	UNITS_PER_WORD(((global_options.x_ix86_isa_flags & (1UL << 1)) !=
 0) ? 8 : 4)
32#endif
33 
34/* Maximum register number used in this function, plus one.  */
35 
36extern int max_regno;
37 
38/* REG_N_REFS and REG_N_SETS are initialized by a call to
39   regstat_init_n_sets_and_refs from the current values of
40   DF_REG_DEF_COUNT and DF_REG_USE_COUNT.  REG_N_REFS and REG_N_SETS
41   should only be used if a pass need to change these values in some
42   magical way or the pass needs to have accurate values for these
43   and is not using incremental df scanning.
44 
45   At the end of a pass that uses REG_N_REFS and REG_N_SETS, a call
46   should be made to regstat_free_n_sets_and_refs.
47 
48   Local alloc seems to play pretty loose with these values.
49   REG_N_REFS is set to 0 if the register is used in an asm.
50   Furthermore, local_alloc calls regclass to hack both REG_N_REFS and
51   REG_N_SETS for three address insns.  Other passes seem to have
52   other special values.  */
53 
54 
55 
56/* Structure to hold values for REG_N_SETS (i) and REG_N_REFS (i). */
57 
58struct regstat_n_sets_and_refs_t
59{
60  int sets;			/* # of times (REG n) is set */
61  int refs;			/* # of times (REG n) is used or set */
62};
63 
64extern struct regstat_n_sets_and_refs_t *regstat_n_sets_and_refs;
65 
66/* Indexed by n, gives number of times (REG n) is used or set.  */
67inline int
68REG_N_REFS (int regno)
69{
70  return regstat_n_sets_and_refs[regno].refs;
71}
72 
73/* Indexed by n, gives number of times (REG n) is used or set.  */
74#define SET_REG_N_REFS(N,V)(regstat_n_sets_and_refs[N].refs = V) (regstat_n_sets_and_refs[N].refs = V)
75#define INC_REG_N_REFS(N,V)(regstat_n_sets_and_refs[N].refs += V) (regstat_n_sets_and_refs[N].refs += V)
76 
77/* Indexed by n, gives number of times (REG n) is set.  */
78inline int
79REG_N_SETS (int regno)
80{
81  return regstat_n_sets_and_refs[regno].sets;
82}
83 
84/* Indexed by n, gives number of times (REG n) is set.  */
85#define SET_REG_N_SETS(N,V)(regstat_n_sets_and_refs[N].sets = V) (regstat_n_sets_and_refs[N].sets = V)
86#define INC_REG_N_SETS(N,V)(regstat_n_sets_and_refs[N].sets += V) (regstat_n_sets_and_refs[N].sets += V)
87 
88/* Given a REG, return TRUE if the reg is a PARM_DECL, FALSE otherwise.  */
89extern bool reg_is_parm_p (rtx);
90 
91/* Functions defined in regstat.cc.  */
92extern void regstat_init_n_sets_and_refs (void);
93extern void regstat_free_n_sets_and_refs (void);
94extern void regstat_compute_ri (void);
95extern void regstat_free_ri (void);
96extern bitmap regstat_get_setjmp_crosses (void);
97extern void regstat_compute_calls_crossed (void);
98extern void regstat_free_calls_crossed (void);
99extern void dump_reg_info (FILE *);
100 
101/* Register information indexed by register number.  This structure is
102   initialized by calling regstat_compute_ri and is destroyed by
103   calling regstat_free_ri.  */
104struct reg_info_t
105{
106  int freq;			/* # estimated frequency (REG n) is used or set */
107  int deaths;			/* # of times (REG n) dies */
108  int calls_crossed;		/* # of calls (REG n) is live across */
109  int basic_block;		/* # of basic blocks (REG n) is used in */
110};
111 
112extern struct reg_info_t *reg_info_p;
113 
114/* The number allocated elements of reg_info_p.  */
115extern size_t reg_info_p_size;
116 
117/* Estimate frequency of references to register N.  */
118 
119#define REG_FREQ(N)(reg_info_p[N].freq) (reg_info_p[N].freq)
120 
121/* The weights for each insn varies from 0 to REG_FREQ_BASE.
122   This constant does not need to be high, as in infrequently executed
123   regions we want to count instructions equivalently to optimize for
124   size instead of speed.  */
125#define REG_FREQ_MAX1000 1000
126 
127/* Compute register frequency from the BB frequency.  When optimizing for size,
128   or profile driven feedback is available and the function is never executed,
129   frequency is always equivalent.  Otherwise rescale the basic block
130   frequency.  */
131#define REG_FREQ_FROM_BB(bb)((optimize_function_for_size_p ((cfun + 0)) || !(cfun + 0)->
cfg->count_max.initialized_p ()) ? 1000 : ((bb)->count.
to_frequency ((cfun + 0)) * 1000 / 10000) ? ((bb)->count.to_frequency
 ((cfun + 0)) * 1000 / 10000) : 1) ((optimize_function_for_size_p (cfun(cfun + 0))	      \
132			       || !cfun(cfun + 0)->cfg->count_max.initialized_p ())     \
133			      ? REG_FREQ_MAX1000				      \
134			      : ((bb)->count.to_frequency (cfun(cfun + 0))	      \
135				* REG_FREQ_MAX1000 / BB_FREQ_MAX10000)		      \
136			      ? ((bb)->count.to_frequency (cfun(cfun + 0))	      \
137				 * REG_FREQ_MAX1000 / BB_FREQ_MAX10000)		      \
138			      : 1)
139 
140/* Indexed by N, gives number of insns in which register N dies.
141   Note that if register N is live around loops, it can die
142   in transitions between basic blocks, and that is not counted here.
143   So this is only a reliable indicator of how many regions of life there are
144   for registers that are contained in one basic block.  */
145 
146#define REG_N_DEATHS(N)(reg_info_p[N].deaths) (reg_info_p[N].deaths)
147 
148/* Get the number of consecutive words required to hold pseudo-reg N.  */
149 
150#define PSEUDO_REGNO_SIZE(N)((GET_MODE_SIZE (((machine_mode) (regno_reg_rtx[N])->mode)
) + (((global_options.x_ix86_isa_flags & (1UL << 1)
) != 0) ? 8 : 4) - 1) / (((global_options.x_ix86_isa_flags &
 (1UL << 1)) != 0) ? 8 : 4)) \
151  ((GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)((machine_mode) (regno_reg_rtx[N])->mode)) + UNITS_PER_WORD(((global_options.x_ix86_isa_flags & (1UL << 1)) !=
 0) ? 8 : 4) - 1)		\
152   / UNITS_PER_WORD(((global_options.x_ix86_isa_flags & (1UL << 1)) !=
 0) ? 8 : 4))
153 
154/* Get the number of bytes required to hold pseudo-reg N.  */
155 
156#define PSEUDO_REGNO_BYTES(N)GET_MODE_SIZE (((machine_mode) (regno_reg_rtx[N])->mode)) \
157  GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)((machine_mode) (regno_reg_rtx[N])->mode))
158 
159/* Get the machine mode of pseudo-reg N.  */
160 
161#define PSEUDO_REGNO_MODE(N)((machine_mode) (regno_reg_rtx[N])->mode) GET_MODE (regno_reg_rtx[N])((machine_mode) (regno_reg_rtx[N])->mode)
162 
163/* Indexed by N, gives number of CALL_INSNS across which (REG n) is live.  */
164 
165#define REG_N_CALLS_CROSSED(N)(reg_info_p[N].calls_crossed)  (reg_info_p[N].calls_crossed)
166 
167/* Indexed by n, gives number of basic block that  (REG n) is used in.
168   If the value is REG_BLOCK_GLOBAL (-1),
169   it means (REG n) is used in more than one basic block.
170   REG_BLOCK_UNKNOWN (0) means it hasn't been seen yet so we don't know.
171   This information remains valid for the rest of the compilation
172   of the current function; it is used to control register allocation.  */
173 
174#define REG_BLOCK_UNKNOWN0 0
175#define REG_BLOCK_GLOBAL-1 -1
176 
177#define REG_BASIC_BLOCK(N)(reg_info_p[N].basic_block) (reg_info_p[N].basic_block)
178 
179/* Vector of substitutions of register numbers,
180   used to map pseudo regs into hardware regs.
181 
182   This can't be folded into reg_n_info without changing all of the
183   machine dependent directories, since the reload functions
184   in the machine dependent files access it.  */
185 
186extern short *reg_renumber;
187 
188/* Flag set by local-alloc or global-alloc if they decide to allocate
189   something in a call-clobbered register.  */
190 
191extern int caller_save_needed;
192 
193/* Select a register mode required for caller save of hard regno REGNO.  */
194#ifndef HARD_REGNO_CALLER_SAVE_MODE
195#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE)(((REGNO) == 17) ? ((void) 0, E_VOIDmode) : (MODE) == ((void)
 0, E_VOIDmode) && (NREGS) != 1 ? ((void) 0, E_VOIDmode
) : (MODE) == ((void) 0, E_VOIDmode) ? choose_hard_reg_mode (
(REGNO), (NREGS), nullptr) : (MODE) == (scalar_int_mode ((scalar_int_mode
::from_int) E_HImode)) && !((((((unsigned long) ((REGNO
)) - (unsigned long) (0) <= (unsigned long) (7) - (unsigned
 long) (0))) || ((unsigned long) ((REGNO)) - (unsigned long) (
36) <= (unsigned long) (43) - (unsigned long) (36))) &&
 ix86_tune_features[X86_TUNE_PARTIAL_REG_STALL]) || ((unsigned
 long) ((REGNO)) - (unsigned long) (68) <= (unsigned long)
 (75) - (unsigned long) (68))) ? (scalar_int_mode ((scalar_int_mode
::from_int) E_SImode)) : (MODE) == (scalar_int_mode ((scalar_int_mode
::from_int) E_QImode)) && !((((global_options.x_ix86_isa_flags
 & (1UL << 1)) != 0) ? ((((unsigned long) ((REGNO))
 - (unsigned long) (0) <= (unsigned long) (7) - (unsigned long
) (0))) || ((unsigned long) ((REGNO)) - (unsigned long) (36) <=
 (unsigned long) (43) - (unsigned long) (36))) : ((unsigned long
) ((REGNO)) - (unsigned long) (0) <= (unsigned long) (3) -
 (unsigned long) (0))) || ((unsigned long) ((REGNO)) - (unsigned
 long) (68) <= (unsigned long) (75) - (unsigned long) (68)
)) ? (scalar_int_mode ((scalar_int_mode::from_int) E_SImode))
 : (MODE)) \
196  choose_hard_reg_mode (REGNO, NREGS, NULLnullptr)
197#endif
198 
199/* Target-dependent globals.  */
200struct target_regs {
201  /* For each starting hard register, the number of consecutive hard
202     registers that a given machine mode occupies.  */
203  unsigned char x_hard_regno_nregs[FIRST_PSEUDO_REGISTER76][MAX_MACHINE_MODE];
204 
205  /* The max value found in x_hard_regno_nregs.  */
206  unsigned char x_hard_regno_max_nregs;
207 
208  /* For each hard register, the widest mode object that it can contain.
209     This will be a MODE_INT mode if the register can hold integers.  Otherwise
210     it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
211     register.  */
212  machine_mode x_reg_raw_mode[FIRST_PSEUDO_REGISTER76];
213 
214  /* Vector indexed by machine mode saying whether there are regs of
215     that mode.  */
216  bool x_have_regs_of_mode[MAX_MACHINE_MODE];
217 
218  /* 1 if the corresponding class contains a register of the given mode.  */
219  char x_contains_reg_of_mode[N_REG_CLASSES((int) LIM_REG_CLASSES)][MAX_MACHINE_MODE];
220 
221  /* 1 if the corresponding class contains a register of the given mode
222     which is not global and can therefore be allocated.  */
223  char x_contains_allocatable_reg_of_mode[N_REG_CLASSES((int) LIM_REG_CLASSES)][MAX_MACHINE_MODE];
224 
225  /* Record for each mode whether we can move a register directly to or
226     from an object of that mode in memory.  If we can't, we won't try
227     to use that mode directly when accessing a field of that mode.  */
228  char x_direct_load[NUM_MACHINE_MODES];
229  char x_direct_store[NUM_MACHINE_MODES];
230 
231  /* Record for each mode whether we can float-extend from memory.  */
232  bool x_float_extend_from_mem[NUM_MACHINE_MODES][NUM_MACHINE_MODES];
233};
234 
235extern struct target_regs default_target_regs;
236#if SWITCHABLE_TARGET1
237extern struct target_regs *this_target_regs;
238#else
239#define this_target_regs (&default_target_regs)
240#endif
241#define hard_regno_max_nregs(this_target_regs->x_hard_regno_max_nregs) \
242  (this_target_regs->x_hard_regno_max_nregs)
243#define reg_raw_mode(this_target_regs->x_reg_raw_mode) \
244  (this_target_regs->x_reg_raw_mode)
245#define have_regs_of_mode(this_target_regs->x_have_regs_of_mode) \
246  (this_target_regs->x_have_regs_of_mode)
247#define contains_reg_of_mode(this_target_regs->x_contains_reg_of_mode) \
248  (this_target_regs->x_contains_reg_of_mode)
249#define contains_allocatable_reg_of_mode(this_target_regs->x_contains_allocatable_reg_of_mode) \
250  (this_target_regs->x_contains_allocatable_reg_of_mode)
251#define direct_load(this_target_regs->x_direct_load) \
252  (this_target_regs->x_direct_load)
253#define direct_store(this_target_regs->x_direct_store) \
254  (this_target_regs->x_direct_store)
255#define float_extend_from_mem(this_target_regs->x_float_extend_from_mem) \
256  (this_target_regs->x_float_extend_from_mem)
257 
258/* Return the number of hard registers in (reg:MODE REGNO).  */
259 
260ALWAYS_INLINEinline __attribute__ ((always_inline)) unsigned char
261hard_regno_nregs (unsigned int regno, machine_mode mode)
262{
263  return this_target_regs->x_hard_regno_nregs[regno][mode];
264}
265 
266/* Return an exclusive upper bound on the registers occupied by hard
267   register (reg:MODE REGNO).  */
268 
269inline unsigned int
270end_hard_regno (machine_mode mode, unsigned int regno)
271{
272  return regno + hard_regno_nregs (regno, mode);
273}
274 
275/* Add to REGS all the registers required to store a value of mode MODE
276   in register REGNO.  */
277 
278inline void
279add_to_hard_reg_set (HARD_REG_SET *regs, machine_mode mode,
280		     unsigned int regno)
281{
282  unsigned int end_regno;
283 
284  end_regno = end_hard_regno (mode, regno);
285  do
32
←
Loop condition is false.  Exiting loop→
39
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Loop condition is false.  Exiting loop→
286    SET_HARD_REG_BIT (*regs, regno);
29
←
Calling 'SET_HARD_REG_BIT'→
30
←
Returning from 'SET_HARD_REG_BIT'→
36
←
Calling 'SET_HARD_REG_BIT'→
37
←
Returning from 'SET_HARD_REG_BIT'→
53
←
Calling 'SET_HARD_REG_BIT'→
287  while (++regno < end_regno);
31
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Assuming the condition is false→
38
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Assuming the condition is false→
288}
289 
290/* Likewise, but remove the registers.  */
291 
292inline void
293remove_from_hard_reg_set (HARD_REG_SET *regs, machine_mode mode,
294			  unsigned int regno)
295{
296  unsigned int end_regno;
297 
298  end_regno = end_hard_regno (mode, regno);
299  do
300    CLEAR_HARD_REG_BIT (*regs, regno);
301  while (++regno < end_regno);
302}
303 
304/* Return true if REGS contains the whole of (reg:MODE REGNO).  */
305 
306inline bool
307in_hard_reg_set_p (const_hard_reg_set regs, machine_mode mode,
308		   unsigned int regno)
309{
310  unsigned int end_regno;
311 
312  gcc_assert (HARD_REGISTER_NUM_P (regno))((void)(!(((regno) < 76)) ? fancy_abort ("/buildworker/marxinbox-gcc-clang-static-analyzer/build/gcc/regs.h"
, 312, __FUNCTION__), 0 : 0));
313  
314  if (!TEST_HARD_REG_BIT (regs, regno))
315    return false;
316 
317  end_regno = end_hard_regno (mode, regno);
318 
319  if (!HARD_REGISTER_NUM_P (end_regno - 1)((end_regno - 1) < 76))
320    return false;
321 
322  while (++regno < end_regno)
323    if (!TEST_HARD_REG_BIT (regs, regno))
324      return false;
325 
326  return true;
327}
328 
329/* Return true if (reg:MODE REGNO) includes an element of REGS.  */
330 
331inline bool
332overlaps_hard_reg_set_p (const_hard_reg_set regs, machine_mode mode,
333			 unsigned int regno)
334{
335  unsigned int end_regno;
336 
337  if (TEST_HARD_REG_BIT (regs, regno))
338    return true;
339 
340  end_regno = end_hard_regno (mode, regno);
341  while (++regno < end_regno)
342    if (TEST_HARD_REG_BIT (regs, regno))
343      return true;
344 
345  return false;
346}
347 
348/* Like add_to_hard_reg_set, but use a REGNO/NREGS range instead of
349   REGNO and MODE.  */
350 
351inline void
352add_range_to_hard_reg_set (HARD_REG_SET *regs, unsigned int regno,
353			   int nregs)
354{
355  while (nregs-- > 0)
356    SET_HARD_REG_BIT (*regs, regno + nregs);
357}
358 
359/* Likewise, but remove the registers.  */
360 
361inline void
362remove_range_from_hard_reg_set (HARD_REG_SET *regs, unsigned int regno,
363				int nregs)
364{
365  while (nregs-- > 0)
366    CLEAR_HARD_REG_BIT (*regs, regno + nregs);
367}
368 
369/* Like overlaps_hard_reg_set_p, but use a REGNO/NREGS range instead of
370   REGNO and MODE.  */
371inline bool
372range_overlaps_hard_reg_set_p (const_hard_reg_set set, unsigned regno,
373			       int nregs)
374{
375  while (nregs-- > 0)
376    if (TEST_HARD_REG_BIT (set, regno + nregs))
377      return true;
378  return false;
379}
380 
381/* Like in_hard_reg_set_p, but use a REGNO/NREGS range instead of
382   REGNO and MODE.  */
383inline bool
384range_in_hard_reg_set_p (const_hard_reg_set set, unsigned regno, int nregs)
385{
386  while (nregs-- > 0)
387    if (!TEST_HARD_REG_BIT (set, regno + nregs))
388      return false;
389  return true;
390}
391 
392#endif /* GCC_REGS_H */