LoongArch Options#
These command-line options are defined for LoongArch targets:
- -march=cpu-type#
Generate instructions for the machine type
cpu-type
. In contrast to-mtune=cpu-type
, which merely tunes the generated code for the specifiedcpu-type
,-march=cpu-type
allows GCC to generate code that may not run at all on processors other than the one indicated. Specifying-march=cpu-type
implies-mtune=cpu-type
, except where noted otherwise.The choices for
cpu-type
are:native
This selects the CPU to generate code for at compilation time by determining the processor type of the compiling machine. Using
-march=native
enables all instruction subsets supported by the local machine (hence the result might not run on different machines). Using-mtune=native
produces code optimized for the local machine under the constraints of the selected instruction set.loongarch64
A generic CPU with 64-bit extensions.
la464
LoongArch LA464 CPU with LBT, LSX, LASX, LVZ.
- -mtune=cpu-type#
Optimize the output for the given processor, specified by microarchitecture name.
- -mabi=base-abi-type#
Generate code for the specified calling convention.
base-abi-type
can be one of:lp64d
Uses 64-bit general purpose registers and 32/64-bit floating-point registers for parameter passing. Data model is LP64, where
int
is 32 bits, whilelong int
and pointers are 64 bits.lp64f
Uses 64-bit general purpose registers and 32-bit floating-point registers for parameter passing. Data model is LP64, where
int
is 32 bits, whilelong int
and pointers are 64 bits.lp64s
Uses 64-bit general purpose registers and no floating-point registers for parameter passing. Data model is LP64, where
int
is 32 bits, whilelong int
and pointers are 64 bits.
- -mfpu=fpu-type#
Generate code for the specified FPU type, which can be one of:
64
Allow the use of hardware floating-point instructions for 32-bit and 64-bit operations.
32
Allow the use of hardware floating-point instructions for 32-bit operations.
none
0
Prevent the use of hardware floating-point instructions.
- -msoft-float#
Force
-mfpu=none
and prevents the use of floating-point registers for parameter passing. This option may change the target ABI.
- -msingle-float#
Force
-mfpu=32
and allow the use of 32-bit floating-point registers for parameter passing. This option may change the target ABI.
- -mdouble-float#
Force
-mfpu=64
and allow the use of 32/64-bit floating-point registers for parameter passing. This option may change the target ABI.
- -mbranch-cost=n#
Set the cost of branches to roughly
n
instructions.
- -mcheck-zero-division, -mno-check-zero-divison#
Trap (do not trap) on integer division by zero. The default is
-mcheck-zero-division
for-O0
or-Og
, and-mno-check-zero-division
for other optimization levels.
- -mcond-move-int, -mno-cond-move-int#
Conditional moves for integral data in general-purpose registers are enabled (disabled). The default is
-mcond-move-int
.
- -mcond-move-float, -mno-cond-move-float#
Conditional moves for floating-point registers are enabled (disabled). The default is
-mcond-move-float
.
- -mmemcpy, -mno-memcpy#
Force (do not force) the use of
memcpy
for non-trivial block moves. The default is-mno-memcpy
, which allows GCC to inline most constant-sized copies. Setting optimization level to-Os
also forces the use ofmemcpy
, but-mno-memcpy
may override this behavior if explicitly specified, regardless of the order these options on the command line.
- -mstrict-align, -mno-strict-align#
Avoid or allow generating memory accesses that may not be aligned on a natural object boundary as described in the architecture specification. The default is
-mno-strict-align
.
- -msmall-data-limit=number#
Put global and static data smaller than
number
bytes into a special section (on some targets). The default value is 0.
- -mmax-inline-memcpy-size=n#
Inline all block moves (such as calls to
memcpy
or structure copies) less than or equal ton
bytes. The default value ofn
is 1024.
- -mcmodel=code-model#
Set the code model to one of:
tiny-static (Not implemented yet)
tiny (Not implemented yet)
normal
The text segment must be within 128MB addressing space. The data segment must be within 2GB addressing space.
medium
The text segment and data segment must be within 2GB addressing space.
large (Not implemented yet)
extreme
This mode does not limit the size of the code segment and data segment. The
-mcmodel=extreme
option is incompatible with-fplt
and-mno-explicit-relocs
.
The default code model is
normal
.
- -mexplicit-relocs, -mno-explicit-relocs#
Use or do not use assembler relocation operators when dealing with symbolic addresses. The alternative is to use assembler macros instead, which may limit optimization. The default value for the option is determined during GCC build-time by detecting corresponding assembler support:
-mexplicit-relocs
if said support is present,-mno-explicit-relocs
otherwise. This option is mostly useful for debugging, or interoperation with assemblers different from the build-time one.
- -mdirect-extern-access, -mno-direct-extern-access#
Do not use or use GOT to access external symbols. The default is
-mno-direct-extern-access
: GOT is used for external symbols with default visibility, but not used for other external symbols.With
-mdirect-extern-access
, GOT is not used and all external symbols are PC-relatively addressed. It is only suitable for environments where no dynamic link is performed, like firmwares, OS kernels, executables linked with-static
or-static-pie
.-mdirect-extern-access
is not compatible with-fPIC
or-fpic
.