LoongArch Options#
These command-line options are defined for LoongArch targets:
- -march=cpu-type#
Generate instructions for the machine type
cpu-type. In contrast to-mtune=cpu-type, which merely tunes the generated code for the specifiedcpu-type,-march=cpu-typeallows GCC to generate code that may not run at all on processors other than the one indicated. Specifying-march=cpu-typeimplies-mtune=cpu-type, except where noted otherwise.The choices for
cpu-typeare:nativeThis selects the CPU to generate code for at compilation time by determining the processor type of the compiling machine. Using
-march=nativeenables all instruction subsets supported by the local machine (hence the result might not run on different machines). Using-mtune=nativeproduces code optimized for the local machine under the constraints of the selected instruction set.loongarch64A generic CPU with 64-bit extensions.
la464LoongArch LA464 CPU with LBT, LSX, LASX, LVZ.
- -mtune=cpu-type#
Optimize the output for the given processor, specified by microarchitecture name.
- -mabi=base-abi-type#
Generate code for the specified calling convention.
base-abi-typecan be one of:lp64dUses 64-bit general purpose registers and 32/64-bit floating-point registers for parameter passing. Data model is LP64, where
intis 32 bits, whilelong intand pointers are 64 bits.lp64fUses 64-bit general purpose registers and 32-bit floating-point registers for parameter passing. Data model is LP64, where
intis 32 bits, whilelong intand pointers are 64 bits.lp64sUses 64-bit general purpose registers and no floating-point registers for parameter passing. Data model is LP64, where
intis 32 bits, whilelong intand pointers are 64 bits.
- -mfpu=fpu-type#
Generate code for the specified FPU type, which can be one of:
64Allow the use of hardware floating-point instructions for 32-bit and 64-bit operations.
32Allow the use of hardware floating-point instructions for 32-bit operations.
none0Prevent the use of hardware floating-point instructions.
- -msoft-float#
Force
-mfpu=noneand prevents the use of floating-point registers for parameter passing. This option may change the target ABI.
- -msingle-float#
Force
-mfpu=32and allow the use of 32-bit floating-point registers for parameter passing. This option may change the target ABI.
- -mdouble-float#
Force
-mfpu=64and allow the use of 32/64-bit floating-point registers for parameter passing. This option may change the target ABI.
- -mbranch-cost=n#
Set the cost of branches to roughly
ninstructions.
- -mcheck-zero-division, -mno-check-zero-divison#
Trap (do not trap) on integer division by zero. The default is
-mcheck-zero-divisionfor-O0or-Og, and-mno-check-zero-divisionfor other optimization levels.
- -mcond-move-int, -mno-cond-move-int#
Conditional moves for integral data in general-purpose registers are enabled (disabled). The default is
-mcond-move-int.
- -mcond-move-float, -mno-cond-move-float#
Conditional moves for floating-point registers are enabled (disabled). The default is
-mcond-move-float.
- -mmemcpy, -mno-memcpy#
Force (do not force) the use of
memcpyfor non-trivial block moves. The default is-mno-memcpy, which allows GCC to inline most constant-sized copies. Setting optimization level to-Osalso forces the use ofmemcpy, but-mno-memcpymay override this behavior if explicitly specified, regardless of the order these options on the command line.
- -mstrict-align, -mno-strict-align#
Avoid or allow generating memory accesses that may not be aligned on a natural object boundary as described in the architecture specification. The default is
-mno-strict-align.
- -msmall-data-limit=number#
Put global and static data smaller than
numberbytes into a special section (on some targets). The default value is 0.
- -mmax-inline-memcpy-size=n#
Inline all block moves (such as calls to
memcpyor structure copies) less than or equal tonbytes. The default value ofnis 1024.
- -mcmodel=code-model#
Set the code model to one of:
tiny-static (Not implemented yet)tiny (Not implemented yet)normalThe text segment must be within 128MB addressing space. The data segment must be within 2GB addressing space.
mediumThe text segment and data segment must be within 2GB addressing space.
large (Not implemented yet)extremeThis mode does not limit the size of the code segment and data segment. The
-mcmodel=extremeoption is incompatible with-fpltand-mno-explicit-relocs.
The default code model is
normal.
- -mexplicit-relocs, -mno-explicit-relocs#
Use or do not use assembler relocation operators when dealing with symbolic addresses. The alternative is to use assembler macros instead, which may limit optimization. The default value for the option is determined during GCC build-time by detecting corresponding assembler support:
-mexplicit-relocsif said support is present,-mno-explicit-relocsotherwise. This option is mostly useful for debugging, or interoperation with assemblers different from the build-time one.
- -mdirect-extern-access, -mno-direct-extern-access#
Do not use or use GOT to access external symbols. The default is
-mno-direct-extern-access: GOT is used for external symbols with default visibility, but not used for other external symbols.With
-mdirect-extern-access, GOT is not used and all external symbols are PC-relatively addressed. It is only suitable for environments where no dynamic link is performed, like firmwares, OS kernels, executables linked with-staticor-static-pie.-mdirect-extern-accessis not compatible with-fPICor-fpic.